JPH02278740A - Packaging of semiconductor device - Google Patents

Packaging of semiconductor device

Info

Publication number
JPH02278740A
JPH02278740A JP9917789A JP9917789A JPH02278740A JP H02278740 A JPH02278740 A JP H02278740A JP 9917789 A JP9917789 A JP 9917789A JP 9917789 A JP9917789 A JP 9917789A JP H02278740 A JPH02278740 A JP H02278740A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
lead frame
sealing
frame
ic chip
ic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9917789A
Inventor
Jiro Hashizume
Tatsuhiko Irie
Hiroshi Saito
Shigenari Takami
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic

Abstract

PURPOSE: To achieve multiple pins and reduce bonding time by joining an IC chip to a lead frame with sealing frame and by performing resin-sealing of the IC chip.
CONSTITUTION: A bump 2 is formed at a proper position of a lead frame 1, namely a position corresponding to the bonding pad of an IC and a sealing frame 3 is mold-formed at a lead frame 1 to allow a diver supporting the lead frame 1 to be cut, thus forming a terminal. An IC chip 5 is joined to a lead frame 4 with sealing frame thus configured, the IC chip 5 is subjected to resin- sealing, thus enabling the IC to be protected. Therefore, the machining limitation of the lead frame can be achieved and bonding pad time becomes constant regardless of the number of pads, thus enabling the process to be efficient.
COPYRIGHT: (C)1990,JPO&Japio
JP9917789A 1989-04-19 1989-04-19 Packaging of semiconductor device Pending JPH02278740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9917789A JPH02278740A (en) 1989-04-19 1989-04-19 Packaging of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9917789A JPH02278740A (en) 1989-04-19 1989-04-19 Packaging of semiconductor device

Publications (1)

Publication Number Publication Date
JPH02278740A true true JPH02278740A (en) 1990-11-15

Family

ID=14240370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9917789A Pending JPH02278740A (en) 1989-04-19 1989-04-19 Packaging of semiconductor device

Country Status (1)

Country Link
JP (1) JPH02278740A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5318926A (en) * 1993-02-01 1994-06-07 Dlugokecki Joseph J Method for packaging an integrated circuit using a reconstructed plastic package
US5406117A (en) * 1993-12-09 1995-04-11 Dlugokecki; Joseph J. Radiation shielding for integrated circuit devices using reconstructed plastic packages
US5700697A (en) * 1993-02-01 1997-12-23 Silicon Packaging Technology Method for packaging an integrated circuit using a reconstructed package
US6262362B1 (en) 1994-04-01 2001-07-17 Maxwell Electronic Components Group, Inc. Radiation shielding of three dimensional multi-chip modules
US6261508B1 (en) 1994-04-01 2001-07-17 Maxwell Electronic Components Group, Inc. Method for making a shielding composition
US6368899B1 (en) 2000-03-08 2002-04-09 Maxwell Electronic Components Group, Inc. Electronic device packaging
US6455864B1 (en) 1994-04-01 2002-09-24 Maxwell Electronic Components Group, Inc. Methods and compositions for ionizing radiation shielding
US6613978B2 (en) 1993-06-18 2003-09-02 Maxwell Technologies, Inc. Radiation shielding of three dimensional multi-chip modules
US6720493B1 (en) 1994-04-01 2004-04-13 Space Electronics, Inc. Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages
US6813828B2 (en) 2002-01-07 2004-11-09 Gel Pak L.L.C. Method for deconstructing an integrated circuit package using lapping
US6884663B2 (en) 2002-01-07 2005-04-26 Delphon Industries, Llc Method for reconstructing an integrated circuit package using lapping
US7382043B2 (en) 2002-09-25 2008-06-03 Maxwell Technologies, Inc. Method and apparatus for shielding an integrated circuit from radiation
US7696610B2 (en) 2003-07-16 2010-04-13 Maxwell Technologies, Inc. Apparatus for shielding integrated circuit devices

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5318926A (en) * 1993-02-01 1994-06-07 Dlugokecki Joseph J Method for packaging an integrated circuit using a reconstructed plastic package
US5700697A (en) * 1993-02-01 1997-12-23 Silicon Packaging Technology Method for packaging an integrated circuit using a reconstructed package
US6858795B2 (en) 1993-06-18 2005-02-22 Maxwell Technologies, Inc. Radiation shielding of three dimensional multi-chip modules
US6613978B2 (en) 1993-06-18 2003-09-02 Maxwell Technologies, Inc. Radiation shielding of three dimensional multi-chip modules
US5406117A (en) * 1993-12-09 1995-04-11 Dlugokecki; Joseph J. Radiation shielding for integrated circuit devices using reconstructed plastic packages
US6455864B1 (en) 1994-04-01 2002-09-24 Maxwell Electronic Components Group, Inc. Methods and compositions for ionizing radiation shielding
US6262362B1 (en) 1994-04-01 2001-07-17 Maxwell Electronic Components Group, Inc. Radiation shielding of three dimensional multi-chip modules
US6720493B1 (en) 1994-04-01 2004-04-13 Space Electronics, Inc. Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages
US6261508B1 (en) 1994-04-01 2001-07-17 Maxwell Electronic Components Group, Inc. Method for making a shielding composition
US6368899B1 (en) 2000-03-08 2002-04-09 Maxwell Electronic Components Group, Inc. Electronic device packaging
US6963125B2 (en) 2000-03-08 2005-11-08 Sony Corporation Electronic device packaging
US6813828B2 (en) 2002-01-07 2004-11-09 Gel Pak L.L.C. Method for deconstructing an integrated circuit package using lapping
US6884663B2 (en) 2002-01-07 2005-04-26 Delphon Industries, Llc Method for reconstructing an integrated circuit package using lapping
US7382043B2 (en) 2002-09-25 2008-06-03 Maxwell Technologies, Inc. Method and apparatus for shielding an integrated circuit from radiation
US7696610B2 (en) 2003-07-16 2010-04-13 Maxwell Technologies, Inc. Apparatus for shielding integrated circuit devices

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