JPS63195687A - Terminal construction of active matrix substrate - Google Patents
Terminal construction of active matrix substrateInfo
- Publication number
- JPS63195687A JPS63195687A JP62027812A JP2781287A JPS63195687A JP S63195687 A JPS63195687 A JP S63195687A JP 62027812 A JP62027812 A JP 62027812A JP 2781287 A JP2781287 A JP 2781287A JP S63195687 A JPS63195687 A JP S63195687A
- Authority
- JP
- Japan
- Prior art keywords
- active matrix
- film
- terminal
- mim
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims description 21
- 239000011159 matrix material Substances 0.000 title claims description 19
- 238000010276 construction Methods 0.000 title description 2
- 239000010408 film Substances 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000010409 thin film Substances 0.000 claims description 8
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims 1
- 229910052715 tantalum Inorganic materials 0.000 claims 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 10
- 239000004973 liquid crystal related substance Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 8
- 239000011521 glass Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、MIM素子をアクティブ素子として用いたア
クティブマトリックス基板の周辺部に形成される外部信
号入力端子の端子構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a terminal structure of an external signal input terminal formed in the peripheral portion of an active matrix substrate using MIM elements as active elements.
アクティブマトリックス基板は、高画質が実現出来るア
クティブマトリックス方式液晶パネルの構成基板であり
、TFT(薄膜トランジスタ)やダイオードあるいはM
IM素子等を透明基板上にマトリックス状に形成したも
のであるーアクティブ素子としては、TFTに比べてM
IM素子の方が、構造がシンプルであるため、製造プロ
セスが短かく、高い歩留りが得られるために、コスト的
に有利であると共に、大型画面化にも適している、第1
図に讐工M素子を用いたアクティブマトリックス基板で
構成したパネルの等価回路図を示す、図中の1は、パネ
ル外形、2は、MIM素子を形成したガラス8にFのI
K頬備半予ネリ−カ六の方向に連結したMIM素子に駆
動信号を入力する端子である。3は、MIM基板と液晶
をはさんで対向するガラス基板上に形成されたストライ
プ状の電極パターンの外部端子であり、通常は工TO等
の透明導電膜にて形成される。4はMIM素子、5は液
晶層である。MIM素子は、電圧−電流特性が、ダイオ
ード特性に似た特性を持つために、外部端子2及び3に
加わる電圧によって、ある画素には信号が書き込まれた
り、ある画素には信号が書き込まれなかったりする。An active matrix substrate is a constituent substrate of an active matrix type liquid crystal panel that can achieve high image quality, and is a component substrate of an active matrix type liquid crystal panel that can achieve high image quality.
It is a device in which IM elements etc. are formed in a matrix on a transparent substrate - as an active element, compared to TFT, M
IM elements have a simpler structure, shorter manufacturing processes, and higher yields, making them more cost-effective and suitable for larger screens.
The figure shows an equivalent circuit diagram of a panel constructed from an active matrix substrate using MIM elements.
This is a terminal for inputting a drive signal to the MIM element connected in the direction of the K-chuck semi-spring knife. Reference numeral 3 denotes an external terminal of a striped electrode pattern formed on a glass substrate facing the MIM substrate with a liquid crystal in between, and is usually formed of a transparent conductive film such as TO. 4 is an MIM element, and 5 is a liquid crystal layer. MIM elements have voltage-current characteristics similar to diode characteristics, so depending on the voltage applied to external terminals 2 and 3, a signal may be written to a certain pixel or no signal may be written to a certain pixel. or
第2図は、MIM基板のパターン図である。FIG. 2 is a pattern diagram of the MIM board.
図中の6はガラス基板、7は第一の金属膜から成るパタ
ーン、8は第二の金属膜から成るパターンである。9は
、工TO等の透明電極から成るパターンであり、画素の
液晶駆動電極となる。に−の金属のパターンと、第二の
金isのパターンとの交点10が、MIM素子となる。In the figure, 6 is a glass substrate, 7 is a pattern made of a first metal film, and 8 is a pattern made of a second metal film. Reference numeral 9 denotes a pattern made of a transparent electrode such as TO, which serves as a liquid crystal drive electrode for a pixel. The intersection point 10 between the - metal pattern and the second gold IS pattern becomes the MIM element.
MIM素子基板の製造工程を簡単に説明すると、次の様
である。The manufacturing process of the MIM element substrate will be briefly explained as follows.
まずガラス基板60表面に、Ta薄膜を形成しパターニ
ングする、C図中の7及び11)、その後Taパターン
の表面を陽極酸化して、TIL酸化膜を形成する0次に
Or薄膜を形成後、所定のパターンにパターニングする
、(図中の8)0次に液晶駆動電極となる工TO薄膜を
形成後、パターニングすると、第2図に示すパターンで
MIM素子がマトリックス状に形成出来る0図中の11
部分は、MIM素子を行方向に接読した外部端子部であ
るが、この部分のTa表面のTa1jfi化膜は、前記
のプロセスの任意の工程にて、エツチング除去し、’r
a金属表面を露出させておく0図中の12は、端子上の
Ta酸化膜を除去する際のパターンである。First, a Ta thin film is formed and patterned on the surface of the glass substrate 60 (7 and 11 in Figure C), and then the surface of the Ta pattern is anodized to form a zero-order Or thin film to form a TIL oxide film. After forming the TO thin film that will become the zero-order liquid crystal drive electrode (8 in the figure), patterning it into a predetermined pattern allows the MIM elements to be formed in a matrix with the pattern shown in Figure 2. 11
This part is an external terminal part where the MIM element is read directly in the row direction.
12 in the figure is a pattern for removing the Ta oxide film on the terminal.
第3図は、このMIMパネル端子部11に外部信号を入
力する際のパネル周辺実装構造の断面図である0図中の
6は、ガラス基板、13はTa薄膜パターン、14はT
&醗化膜である。この実装は一例として、異方性導電シ
ート17を用いた実装方式にて説明する1図中の15は
ポリイミドテープ等の7レキシプルテープであり、16
は該テープ上のリード線である。リード線と、MIM基
板上のTa端子部とは、その間に異方性導電シート17
をはさんで加熱圧着することにより導通がとれる様にな
る。この実装方式は、構造的にシンプルであり、信頼性
が十分確保出来ると予想されたが、信頼性上の大きな問
題が生じた。FIG. 3 is a cross-sectional view of the panel peripheral mounting structure when inputting external signals to this MIM panel terminal section 11. In FIG. 0, 6 is a glass substrate, 13 is a Ta thin film pattern, and 14 is a T
& It is a molten film. As an example, this mounting will be explained using a mounting method using an anisotropic conductive sheet 17. 15 in Figure 1 is a 7 lexiple tape such as polyimide tape, and 16
is the lead wire on the tape. An anisotropic conductive sheet 17 is placed between the lead wire and the Ta terminal portion on the MIM board.
Conductivity can be established by heat-pressing the two. This implementation method was structurally simple and was expected to be sufficiently reliable, but a major reliability problem arose.
すなわち、第3図Cb)の実装構造において、高温動作
もしくは、耐湿試験等を実施すると、リード線16とT
a端子間の抵抗が増大し、ある時間以降では、耐圧を持
つてしまうという点であった、この現象は、雰囲気中の
酸素が、異方性導電膜中を拡散し、76表面にてIll
、原子と結合して簿−酸化被膜を作るためと考えられる
1本発明は、この様な致命的な問題を解決するた・めに
発明されたものである。That is, in the mounting structure shown in FIG.
The resistance between the a terminals increases and after a certain time, the withstand voltage is reached.This phenomenon is caused by oxygen in the atmosphere diffusing in the anisotropic conductive film and causing IllI on the surface of 76.
The present invention was invented in order to solve such a fatal problem.
この問題は、前記した如く、試験3[気中の酸専屑ヱ為
2に十編増−Pa + J 1山φ−赫起1−鋼−表
面でTa酸化膜を形成するために生じる現象であるから
、Taの金目表面を何らかの酸化に対して強い被膜でお
おう必要がある。金の薄膜等を用いることも考えられる
が、プロセスが長くなるため、・メリッシは少ない0本
MIM基板においては前述した如く、液晶駆動電極とし
て工TO薄膜を用いているため、同一プロセスで形成出
来る工TOAI膜でTa金属表面をおおう構造を検討し
た。This problem, as mentioned above, is a phenomenon that occurs due to the formation of a Ta oxide film on the surface of Test 3 [Airborne acid only. Therefore, it is necessary to cover the surface of the Ta metal grain with a film that is resistant to oxidation. It is also possible to use a thin film of gold, etc., but the process would be longer. - As mentioned above, in the case of MIM substrates, which have a small number of MIMs, a TO thin film is used as the liquid crystal drive electrode, so it can be formed in the same process. We investigated a structure in which a Ta metal surface is covered with a TOAI film.
第4図は、本発明によるアクティブマトリックス基板の
端子構造のパターンを説明するパターン図である0図中
の18は、液晶駆動i!電極パターン同一プロセスで形
成されたx′rOパターンでありTa端子上に2層状態
で形成されている。FIG. 4 is a pattern diagram explaining the pattern of the terminal structure of the active matrix substrate according to the present invention. 18 in FIG. 0 is a liquid crystal driving i! The electrode pattern is an x'rO pattern formed in the same process, and is formed in two layers on the Ta terminal.
第5図に断、面図を示す、第5図(α)中の6はガラス
基板、13はTaから成る端子部、14はTa酸化膜で
ある。端子部の′!′a酸化膜を除去した上に図中の1
8で示す工TO薄膜を形成し、端一14堪/A)−1,
1−T’Fn/T’*増”!、”5)−1−す−、=y
im造を採用したパネル実装構造を第5図Cb)に示す
、この構造を従来と同様の高温動作及び耐湿度試験等で
、接続部の接触抵抗の変化を調べた結果、はとんど実用
上問題ないレベルでありた。FIG. 5 shows a cross section and a plan view. In FIG. 5 (α), 6 is a glass substrate, 13 is a terminal portion made of Ta, and 14 is a Ta oxide film. '! of the terminal section! 'a After removing the oxide film,
Form a TO thin film as shown in 8,
1-T'Fn/T'*increase"!,"5)-1-su-,=y
Figure 5Cb) shows a panel mounting structure using im construction.We conducted high-temperature operation and humidity resistance tests on this structure in the same manner as before, and examined the changes in contact resistance at the connection parts. It was at a level that caused no problems.
第6図は、接触抵抗の経時変化の一例を示した図である
。60℃90%の耐湿度試験での結果である。縦軸は接
触抵抗の初期値を1として、時間毎の変化を記入しであ
る。端子がTaのみのものは、徐々に抵抗が増加し、2
0〜10011[後で数VIQ度の耐圧をもつのに対し
、端子が工T O/ Taの2層構造のものは、はとん
ど抵抗の変化がない。FIG. 6 is a diagram showing an example of a change in contact resistance over time. These are the results of a humidity resistance test at 60°C and 90%. The vertical axis shows the change over time, with the initial value of the contact resistance being 1. For those with only Ta terminals, the resistance gradually increases and 2
0 to 10011 [later, it has a withstand voltage of several VIQ degrees, whereas the two-layer structure with terminals made of T O/Ta has almost no change in resistance.
本発明は以上説明した如く、透明基板主に、MIM素子
をマトリックス状に形成したアクティブパネル用のアク
ティブマトリックス基板の端子構造として、行あるいは
列方向に結ばれたMIM素子の金m膜上に、液晶駆動電
極用の透明導電膜を重ね合わせた二層構造を採用するこ
とにより、非常に信頼性の高い実装方式を確立出来たこ
とを特徴とするものであり、文工M素子を用いたものは
もちろんであるが、それ以外のアクティブマトリックス
素子の場合においても適用出来る端子構造を提供するも
のである0本発明は、工T O/ T aの端子構造に
ついて説明したが、Ta以外の金目でも適用出来ること
は言うに及ばない。As explained above, the present invention uses a transparent substrate mainly as a terminal structure of an active matrix substrate for an active panel in which MIM elements are formed in a matrix, on a gold film of MIM elements connected in the row or column direction. By adopting a two-layer structure of overlapping transparent conductive films for liquid crystal drive electrodes, we have established an extremely reliable mounting method. Of course, this invention provides a terminal structure that can be applied to other types of active matrix elements. Needless to say, it can be applied.
また実施例は、異方性導電膜を用いた実装方法について
説明したが、Ta端子表面の酸化が問題となる他の実装
方式におりても、本発明による二層構造端子は、大変有
効である。In addition, although the embodiment described a mounting method using an anisotropic conductive film, the double-layer structure terminal according to the present invention is very effective even in other mounting methods where oxidation of the Ta terminal surface is a problem. be.
第1図は、非線形素子MIMを用いたアクティブマトリ
ックスパネルの等価回路図、第2図は、M工Vアクティ
ブマトリックス基板のパターン図、第3図は、従来のM
IMパネルの周辺端子の実装構造図。第4図は、本発明
による工T O/ T a2層構造パターンの説明図、
第5図は本発明によるアクティブマトリックス基板の端
子構造を採用した実装構造図、第6図は、従来の端子構
造と、本発明の端子構造の接触抵抗の経時変化を比較し
たデータ図。
以上
出願人 セイコーエプソン株式会社
(b)
14図
(a)
(b)
第5図Fig. 1 is an equivalent circuit diagram of an active matrix panel using nonlinear elements MIM, Fig. 2 is a pattern diagram of an M-V active matrix board, and Fig. 3 is a conventional M
A mounting structure diagram of peripheral terminals of the IM panel. FIG. 4 is an explanatory diagram of a two-layer structure pattern of TO/Ta according to the present invention;
FIG. 5 is a diagram of a mounting structure employing the terminal structure of an active matrix board according to the present invention, and FIG. 6 is a data diagram comparing the change in contact resistance over time between a conventional terminal structure and a terminal structure of the present invention. Applicant: Seiko Epson Corporation (b) Figure 14 (a) (b) Figure 5
Claims (2)
)素子と、一方の該金属膜に接続された透明駆動電極と
からなる画素回路がマトリックス状に形成され、他方の
該金属膜が行あるいは列方向に互いに結ばれたアクティ
ブマトリックス基板の端子構造として、行あるいは列方
向に互いに結ばれた金属膜の終端部の上に、該透明駆動
電極用の薄膜が形成された2層構造であることを特徴と
するアクティブマトリックス基板の端子構造。(1) A pixel circuit consisting of an MIM (metal film-insulating film-metal film) element and a transparent drive electrode connected to one of the metal films is formed in a matrix on a transparent substrate, and the other metal film is As a terminal structure of an active matrix substrate in which films are connected to each other in the row or column direction, a two-layer thin film for the transparent drive electrode is formed on the terminal end of a metal film that is connected to each other in the row or column direction. A terminal structure of an active matrix board, characterized in that:
O(インジウム−スズ酸化物)膜が形成された2層構造
であることを特徴とする特許請求の範囲第1項記載のア
クティブマトリックス基板の端子構造。(2) As a terminal structure, IT is placed on the Ta (tantalum) film.
The terminal structure of an active matrix substrate according to claim 1, characterized in that it has a two-layer structure in which an O (indium-tin oxide) film is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62027812A JPS63195687A (en) | 1987-02-09 | 1987-02-09 | Terminal construction of active matrix substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62027812A JPS63195687A (en) | 1987-02-09 | 1987-02-09 | Terminal construction of active matrix substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63195687A true JPS63195687A (en) | 1988-08-12 |
Family
ID=12231384
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62027812A Pending JPS63195687A (en) | 1987-02-09 | 1987-02-09 | Terminal construction of active matrix substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63195687A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63296021A (en) * | 1987-05-28 | 1988-12-02 | Canon Inc | Liquid crystal display panel and its production |
JPS6447084U (en) * | 1987-09-16 | 1989-03-23 | ||
JPH02149920U (en) * | 1989-05-25 | 1990-12-21 | ||
JPH0457883U (en) * | 1990-09-20 | 1992-05-18 | ||
WO1996014599A1 (en) * | 1994-11-08 | 1996-05-17 | Citizen Watch Co., Ltd. | Liquid crystal display |
US5608559A (en) * | 1993-12-07 | 1997-03-04 | Sharp Kabushiki Kaisha | Display board having wiring with three-layered structure and a display device including the display board |
WO2010058738A1 (en) * | 2008-11-21 | 2010-05-27 | シャープ株式会社 | Substrate for display panel, and display panel |
JP2011248696A (en) * | 2010-05-28 | 2011-12-08 | Kyocera Corp | Input device and display device including input device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60161686A (en) * | 1984-02-02 | 1985-08-23 | Seiko Epson Corp | Manufacture of thin film non-linear device |
-
1987
- 1987-02-09 JP JP62027812A patent/JPS63195687A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60161686A (en) * | 1984-02-02 | 1985-08-23 | Seiko Epson Corp | Manufacture of thin film non-linear device |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63296021A (en) * | 1987-05-28 | 1988-12-02 | Canon Inc | Liquid crystal display panel and its production |
JPS6447084U (en) * | 1987-09-16 | 1989-03-23 | ||
JPH02149920U (en) * | 1989-05-25 | 1990-12-21 | ||
JPH0457883U (en) * | 1990-09-20 | 1992-05-18 | ||
US5608559A (en) * | 1993-12-07 | 1997-03-04 | Sharp Kabushiki Kaisha | Display board having wiring with three-layered structure and a display device including the display board |
US6128050A (en) * | 1994-11-08 | 2000-10-03 | Citizen Watch Co., Ltd. | Liquid crystal display device with separated anode oxide electrode |
WO1996014599A1 (en) * | 1994-11-08 | 1996-05-17 | Citizen Watch Co., Ltd. | Liquid crystal display |
US6327443B1 (en) | 1994-11-08 | 2001-12-04 | Citizen Watch Co., Ltd. | Liquid crystal display device |
US6388720B1 (en) | 1994-11-08 | 2002-05-14 | Citizen Watch Co., Ltd. | Liquid crystal display including signal electrodes connected to each other by first anode oxide electrode and auxiliary electrode connected to second anode oxide electrode |
WO2010058738A1 (en) * | 2008-11-21 | 2010-05-27 | シャープ株式会社 | Substrate for display panel, and display panel |
CN102224536A (en) * | 2008-11-21 | 2011-10-19 | 夏普株式会社 | Substrate for display panel, and display panel |
JP5306369B2 (en) * | 2008-11-21 | 2013-10-02 | シャープ株式会社 | Substrate for display panel, display panel |
JP2011248696A (en) * | 2010-05-28 | 2011-12-08 | Kyocera Corp | Input device and display device including input device |
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