JPS6316766U - - Google Patents
Info
- Publication number
- JPS6316766U JPS6316766U JP11083586U JP11083586U JPS6316766U JP S6316766 U JPS6316766 U JP S6316766U JP 11083586 U JP11083586 U JP 11083586U JP 11083586 U JP11083586 U JP 11083586U JP S6316766 U JPS6316766 U JP S6316766U
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- signal
- television receiver
- level difference
- definition television
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005070 sampling Methods 0.000 claims description 3
- 230000003321 amplification Effects 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
Description
第1図は本考案によるAGC回路の一実施例を
示す回路ブロツク図、第2図はその動作説明のた
めの信号波形図である。
1……入力端子、2……可変利得増幅回路、3
……A/D変換回路、6……サンプリング回路、
9……D/A変換回路。
FIG. 1 is a circuit block diagram showing one embodiment of the AGC circuit according to the present invention, and FIG. 2 is a signal waveform diagram for explaining its operation. 1...Input terminal, 2...Variable gain amplifier circuit, 3
...A/D conversion circuit, 6...Sampling circuit,
9...D/A conversion circuit.
Claims (1)
されると共に、サブサンプル方式により帯域圧縮
されたTCI映像信号を受信する高品位テレビ受
像機のためのAGC回路であつて、実信した前記
TCI映像信号をA/D変換し、そのA/D変換
された信号の水平同期信号期間中の所定の2点間
のレベル差をその同期信号に同期したタイミング
パルスによつてサンプリングして検出し、その検
出された上記レベル差を表わすデジタル値の基準
値からのずれに応じて前記映像信号の増幅利得を
制御するようにしてなる高品位テレビ受像機のA
GC回路。 This is an AGC circuit for a high-definition television receiver in which a horizontal synchronizing signal having the same polarity as the video signal part is inserted and which receives a TCI video signal band-compressed by a sub-sampling method. A/D converting the video signal, sampling and detecting the level difference between two predetermined points during the horizontal synchronization signal period of the A/D converted signal using a timing pulse synchronized with the synchronization signal, A high-definition television receiver that controls the amplification gain of the video signal according to the deviation of the digital value representing the detected level difference from the reference value.
GC circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11083586U JPS6316766U (en) | 1986-07-18 | 1986-07-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11083586U JPS6316766U (en) | 1986-07-18 | 1986-07-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6316766U true JPS6316766U (en) | 1988-02-03 |
Family
ID=30990204
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11083586U Pending JPS6316766U (en) | 1986-07-18 | 1986-07-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6316766U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62189885A (en) * | 1986-02-14 | 1987-08-19 | Matsushita Electric Ind Co Ltd | Automatic gain controller |
-
1986
- 1986-07-18 JP JP11083586U patent/JPS6316766U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62189885A (en) * | 1986-02-14 | 1987-08-19 | Matsushita Electric Ind Co Ltd | Automatic gain controller |
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