JPS62105675U

JPS62105675U -

Info

Publication number: JPS62105675U
Application number: JP19722685U
Authority: JP
Priority date: 1985-12-20
Filing date: 1985-12-20
Publication date: 1987-07-06

Description

[Brief explanation of the drawing]

第１図ないし第３図はこの考案の高品位テレビ
ジヨン受像機の１実施例を示し、第１図はブロツ
ク図、第２図は制御信号形成回路の詳細なブロツ
ク図、第３図ａ〜ｃは第１図の動作説明用のタイ
ミングチヤート、第４図は高品位テレビ放送信号
の信号フオーマツトの説明図、第５図は従来の高
品位テレビジヨン受像機のブロツク図である。２……デジタル変換回路、３……データ分離回
路、４……同期分離回路、５……位相ずれ検出回
路、６……発振回路、７……同期パルス発生回路
、８……制御信号形成回路、９……補償回路、１
０……信号切換回路。 1 to 3 show an embodiment of the high-definition television receiver of this invention, in which FIG. 1 is a block diagram, FIG. 2 is a detailed block diagram of a control signal forming circuit, and FIGS. FIG. 4 is a timing chart for explaining the operation of FIG. 1, FIG. 4 is a diagram for explaining the signal format of a high-definition television broadcast signal, and FIG. 5 is a block diagram of a conventional high-definition television receiver. 2...Digital conversion circuit, 3...Data separation circuit, 4...Synchronization separation circuit, 5...Phase shift detection circuit, 6...Oscillation circuit, 7...Synchronization pulse generation circuit, 8...Control signal forming circuit , 9...compensation circuit, 1
0...Signal switching circuit.

Claims

[Scope of utility model registration request]

a digital conversion circuit for digitally converting a received signal of a high-quality television broadcast signal formed by band compression processing of multiplex sub-Nyquist sampling encoding under the control of a reference clock signal; a received horizontal synchronization signal of the conversion circuit; synchronization data extraction processing means for extracting the output data of the received frame pulse signal and forming a frame reference position detection pulse signal from the output data of the received frame pulse signal; and the conversion circuit based on the output data of the received horizontal synchronization signal. a phase shift detection circuit that detects a phase shift in the operation of the circuit and outputs a phase shift detection signal proportional to the phase shift; an oscillation circuit that generates the reference clock pulse signal; the reference clock pulse signal and the detection pulse signal are input; A high-definition television set comprising: a synchronization pulse generation circuit that generates synchronization pulses; and digital demodulation means that demodulates video and audio output data of the conversion circuit using the reference clock pulse signal, the internal horizontal synchronization signal, and the internal frame pulse signal. a control signal forming circuit that identifies a non-insertion period of the received horizontal synchronizing signal in the received signal based on the position of the internal frame pulse signal and outputs a control signal during the non-insertion period; a compensation circuit that outputs a compensation signal set to the phase shift detection signal when there is no phase shift;
The phase shift detection signal and the compensation signal are input, and the phase shift detection signal is output to the oscillation circuit during the non-output period of the control signal, and the compensation signal is supplied to the oscillation circuit during the output period of the control signal. A high-definition television receiver equipped with an output signal switching circuit.