JPH024364U - - Google Patents
Info
- Publication number
- JPH024364U JPH024364U JP8090388U JP8090388U JPH024364U JP H024364 U JPH024364 U JP H024364U JP 8090388 U JP8090388 U JP 8090388U JP 8090388 U JP8090388 U JP 8090388U JP H024364 U JPH024364 U JP H024364U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- clamp
- clamp pulse
- signal processing
- video signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 6
- 230000003321 amplification Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Description
第１図は本考案の映像信号処理回路の実施例を
示すブロツク図、第２図は第１図の動作説明用の
信号波形図、第３図は従来の映像信号処理回路を
示すブロツク図、第４図は従来の映像信号処理回
路の具体的回路を示す図、第５図は第４図におけ
るクランプ回路の等価回路を示す図、第６図は第
５図の動作説明用の信号波形図である。
１……入力端子、２……クランプ回路、３……
映像増幅回路、４……ＣＲＴ、５……同期分離回
路、６，１２……クランプパルス発生回路、７…
…水平偏向回路、８……周波数電圧変換回路、９
……位相比較回路、１０……電圧制御発振器、１
１……水平偏向出力回路、ＴＨ１，ＴＨ２……水
平周期、Ｔｐ１，Ｔｐ２……クランプパルスのパ
ルス幅。
FIG. 1 is a block diagram showing an embodiment of the video signal processing circuit of the present invention, FIG. 2 is a signal waveform diagram for explaining the operation of FIG. 1, and FIG. 3 is a block diagram showing a conventional video signal processing circuit. Fig. 4 is a diagram showing a specific circuit of a conventional video signal processing circuit, Fig. 5 is a diagram showing an equivalent circuit of the clamp circuit in Fig. 4, and Fig. 6 is a signal waveform diagram for explaining the operation of Fig. 5. It is. 1...Input terminal, 2...Clamp circuit, 3...
Video amplification circuit, 4...CRT, 5...Sync separation circuit, 6, 12...Clamp pulse generation circuit, 7...
...Horizontal deflection circuit, 8...Frequency voltage conversion circuit, 9
... Phase comparison circuit, 10 ... Voltage controlled oscillator, 1
1...Horizontal deflection output circuit, TH1 , TH2 ...Horizontal period, Tp1 , Tp2 ...Pulse width of clamp pulse.
Claims (1)
クランプパルスによりクランプするクランプ回路
と、 前記クランプパルスのパルス幅を、前記映像入
力信号の水平周期に比例して変化させ、前記クラ
ンプ回路へ出力するクランプパルス発生回路とを
有して構成したことを特徴とする映像信号処理回
路。[Claims for Utility Model Registration] A clamp circuit that clamps a video input signal with a clamp pulse during its blanking period; 1. A video signal processing circuit comprising: a clamp pulse generation circuit that outputs a clamp pulse to the circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8090388U JPH067631Y2 (en) | 1988-06-17 | 1988-06-17 | Video signal processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8090388U JPH067631Y2 (en) | 1988-06-17 | 1988-06-17 | Video signal processing circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH024364U true JPH024364U (en) | 1990-01-11 |
| JPH067631Y2 JPH067631Y2 (en) | 1994-02-23 |
Family
ID=31305716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8090388U Expired - Lifetime JPH067631Y2 (en) | 1988-06-17 | 1988-06-17 | Video signal processing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH067631Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4896034U (en) * | 1972-02-16 | 1973-11-15 | ||
| JPH0241568U (en) * | 1988-09-12 | 1990-03-22 |
-
1988
- 1988-06-17 JP JP8090388U patent/JPH067631Y2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4896034U (en) * | 1972-02-16 | 1973-11-15 | ||
| JPH0241568U (en) * | 1988-09-12 | 1990-03-22 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH067631Y2 (en) | 1994-02-23 |