JPS6285066U

JPS6285066U -

Info

Publication number: JPS6285066U
Application number: JP17641685U
Authority: JP
Priority date: 1985-11-15
Filing date: 1985-11-15
Publication date: 1987-05-30

Description

[Brief explanation of the drawing]

第１図は実施例の回路ブロツク図、第２図、第
４図は波形図、第３図は従来例の回路ブロツク図
である。２……可変利得増幅回路、３……同期分離回路
、１０……クランプパルス作成回路、１１……ペ
デスタルクランプ回路、１３，１４……第１、第
２ピーク検波回路、１５，１６……第１、第２比
較回路、１７……振幅基準作成回路、１８……結
合回路。 FIG. 1 is a circuit block diagram of an embodiment, FIGS. 2 and 4 are waveform diagrams, and FIG. 3 is a circuit block diagram of a conventional example. 2... Variable gain amplifier circuit, 3... Synchronous separation circuit, 10... Clamp pulse generation circuit, 11... Pedestal clamp circuit, 13, 14... First and second peak detection circuit, 15, 16... 1, second comparison circuit, 17...amplitude standard creation circuit, 18...coupling circuit.

Claims

[Scope of utility model registration request]

a variable gain amplifier circuit that inputs a composite video signal;
A first detection circuit detects the amplitude of the video portion of the output of the variable gain amplifier circuit, a second detection circuit detects the amplitude of the synchronous portion, and creates a synchronous amplitude standard and a video amplitude standard, and also generates a synchronous amplitude standard and a video amplitude standard. an amplitude reference generation circuit that can change the amplitude reference in conjunction with the amplitude reference at a predetermined rate; a first comparison circuit that compares the output of the first detection circuit with the synchronous amplitude reference; and an output of the second detection circuit and an image. An AGC circuit comprising: a second comparison circuit that compares the amplitude with an amplitude reference; and a coupling circuit that selects and applies the output that lowers the gain of the variable gain amplifier circuit from among the outputs of the first and second comparison circuits.