JPS63164243U - - Google Patents
Info
- Publication number
- JPS63164243U JPS63164243U JP5591187U JP5591187U JPS63164243U JP S63164243 U JPS63164243 U JP S63164243U JP 5591187 U JP5591187 U JP 5591187U JP 5591187 U JP5591187 U JP 5591187U JP S63164243 U JPS63164243 U JP S63164243U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- lead terminals
- lead terminal
- soldered portion
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000004020 conductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 1
Description
第１図は本考案の一実施例を示し、同図ａは平
面図、同図ｂは正面図、同図ｃは一部の拡大正面
図、第２図は第１図の半導体装置を実装するプリ
ント基板のランドパツド及びパターンラインの一
部を示す平面図、第３図は従来のフラツト形半導
体装置を示し、同図ａは平面図、同図ｂは正面図
、第４図は第３図の半導体装置を実装するプリン
ト基板のランドパツドを示す平面図、第５図はプ
リント基板の最小導体幅、最小導体間隔を示す平
面図である。
１……半導体装置本体、２……リード端子、２
Ａ……外側リード端子、２Ｂ……内側リード端子
、２Ａａ，２Ｂａ……半田付部分、３……プリン
ト基板、４Ａ，４Ｂ……ランドパツト、５……パ
ターンライン、１１……半導体装置本体、１２…
…リード端子、１３……プリント基板、１４……
ランドパツド、１５……パターンライン、１６…
…パターン面。
Figure 1 shows an embodiment of the present invention, in which figure a is a plan view, figure b is a front view, figure c is a partially enlarged front view, and figure 2 is a mounting of the semiconductor device of figure 1. FIG. 3 is a plan view showing part of the land pads and pattern lines of a printed circuit board, and FIG. 3 shows a conventional flat type semiconductor device, FIG. 4 is a plan view, FIG. FIG. 5 is a plan view showing a land pad of a printed circuit board on which a semiconductor device is mounted, and FIG. 5 is a plan view showing the minimum conductor width and minimum conductor spacing of the printed circuit board. 1...Semiconductor device main body, 2...Lead terminal, 2
A...Outer lead terminal, 2B...Inner lead terminal, 2Aa, 2Ba...Soldering portion, 3...Printed circuit board, 4A, 4B...Land pad, 5...Pattern line, 11...Semiconductor device body, 12 …
...Lead terminal, 13...Printed circuit board, 14...
Land padded, 15...Pattern line, 16...
...Pattern surface.
Claims (1)
置において、半導体装置本体の四周囲から突出さ
れる複数本のリード端子を、長い外側リード端子
と短い内側リード端子とで構成してこれらを交互
に配列し、かつ外側リード端子の半田付部分が内
側リード端子の半田付部分よりも実装方向に対し
て下方に位置するように形成したことを特徴とす
る半導体装置。 In a resin-sealed flat type semiconductor device for surface mounting, a plurality of lead terminals protruding from the four peripheries of the semiconductor device body are composed of long outer lead terminals and short inner lead terminals, and these are arranged alternately. A semiconductor device characterized in that the soldered portion of the outer lead terminal is located lower than the soldered portion of the inner lead terminal with respect to the mounting direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5591187U JPS63164243U (en) | 1987-04-15 | 1987-04-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5591187U JPS63164243U (en) | 1987-04-15 | 1987-04-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63164243U true JPS63164243U (en) | 1988-10-26 |
Family
ID=30884248
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5591187U Pending JPS63164243U (en) | 1987-04-15 | 1987-04-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63164243U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0567010U (en) * | 1992-02-10 | 1993-09-03 | アイワ株式会社 | Surface mount electronic components |
-
1987
- 1987-04-15 JP JP5591187U patent/JPS63164243U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0567010U (en) * | 1992-02-10 | 1993-09-03 | アイワ株式会社 | Surface mount electronic components |