JPS63144544A - Formation of semiconductor interelement isolation region - Google Patents

Abstract

PURPOSE:To eliminate the bite of an oxide film into an active element region and to contrive an increase in density by a method wherein a selective thermal oxidation is performed using a heat-resisting mask pattern formed by etching selectively a heat-resisting coat using an Si oxide film as a mask. CONSTITUTION:A four-layer film consisting of an Si oxide film 2, an Si nitride film 3, a poly Si layer 4 and an Si nitride film 5 is formed on an Si substrate 1. The nitride film 5 is patterned, the nitride film 5 on a region, where the formation of an active element is expected, is removed and thereafter, when a selective thermal oxidation is performed, part of the Si layer 4 is converted into an Si oxide film 7. Then, after the nitride film 5 and the Si layer 4 are removed, an impurity (impurity ions) 8 of the same conductivity type as that of the substrate 1 is ion-implanted in the substrate using the oxide film 7 as a mask to form impurity implanted regions 9. The oxide film 7 is etched away and when a thermal oxidation is anew performed using the oxide film 3 as a mask, a thick field oxide film 10 and an impurity diffused region 11 can be simultaneously formed. After that, the Si nitride film mask 3 and the oxide film 2 are removed and when a normal production process is executed, a desired MOS transistor can be obtained.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to a method for forming an insulating isolation region between elements formed on a semiconductor substrate, and particularly to a method for forming an insulating isolation region between elements formed on a semiconductor substrate. Regarding the shape of the area □Regarding the formation method.

[Conventional technology]

Today's semiconductor devices are typically manufactured in a LOCO8 structure, in which semiconductor elements are placed within an island-like region surrounded by a floating field oxide film that is selectively patterned on the silicon substrate of the region. The thick oxide film separates each semiconductor element into lP3. This thick field oxide film is formed by selective thermal oxidation using an oxidation-resistant mask such as a silicon nitride film, as is already known.

[Problem that the invention seeks to solve]

In this conventional method of forming a W region in an insulating portion by selective oxidation, the formed oxide film digs into the lower part of the oxidation-resistant mask, thereby reducing the width of the active element chain plate. Therefore,
Particularly in the case of a horizontal circuit device that uses N10S transistor elements as a component, attempting to miniaturize the channel width of the M08 transistor to less than about 2 μnl will result in a channel narrowing effect due to the lateral encroachment of the oxide film, and the transistor threshold will be reduced. While increasing the value voltage to a width of 11
This greatly reduces the flow rate, making it extremely difficult to increase the density of integrated circuit devices.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming isolation regions between semiconductor devices without causing an insulating oxide film to dig into active device regions.

[Means for solving problems]

According to the present invention, a method for forming an isolation region between semiconductor elements includes the steps of laminating a heat-resistant film and a polycrystalline silicon layer on a semiconductor substrate, and converting a part of the polycrystalline silicon layer into a silicon oxide film. a step of selectively thermally oxidizing polycrystalline silicon; a step of forming a heat-resistant mask pattern for selectively etching the heat-resistant film using the converted silicon oxide film as a mask; Combined with selective thermal oxidation process of the substrate.

〔Example〕

The present invention will be described in detail below with reference to the drawings.

Figures 1 fa) to (e) are process diagrams showing one embodiment of the present invention. This 8th example shows a case in which the method is applied to the manufacture of MOS transistors. According to this embodiment, first, as shown in FIG. 1(a), four layers of a silicon oxide film 2, a silicon nitride film 3, a polycrystalline silicon layer 4, and a silicon nitride film 5 are formed on a silicon substrate 1. Ru. Here, the silicon oxide film 2 is for stress relaxation during selective oxidation, and the silicon nitride film 3 is an oxidation-resistant mask material. Next, as shown in FIG. 1B, the uppermost silicon nitride film 5 is patterned by a photolithography process using a photoresist 6, and the silicon nitride film 5 on the area where the active element is to be formed is removed. Next, by performing selective thermal oxidation using this patterned silicon nitride film 5 as a mask, a structure as shown in the first figure (C) is obtained. That is, a part of polycrystalline silicon layer 4 is converted into silicon oxide film 7.

Next, after removing the silicon nitride film 5 and the polycrystalline silicon layer 4 that remained unconverted, impurities 8 of the same conductivity type as the silicon substrate 1 are added using the silicon oxide film 7 as a mask, as shown in FIG. Ions are implanted into the silicon substrate to form impurity implanted regions 9.

If silicon oxide film 7 is etched away and thermal oxidation is performed again using silicon nitride film 3 as a mask, thick field oxide film 10 and impurity diffusion region 11 can be formed at the same time. Thereafter, the silicon nitride film mask 3 and the silicon oxide film 2 are removed and normal manufacturing steps are performed to obtain a desired MOS transistor. According to this embodiment,
A mask made of an oxidation-resistant silicon nitride film 3 for forming a thick field oxide film 10 by thermal oxidation is a mask made of polycrystalline silicon 4.
It is formed by reactive ion etching using a silicon oxide film 7 formed by selective oxidation as a mask. Therefore, the pattern width of the formed oxidation-resistant mask 3 is influenced by the pattern of the silicon oxide film 7), which has already slightly expanded in the lateral direction due to lateral encroachment during selective oxidation. Therefore, it is possible to compensate in advance for the loss of the active element region. That is, it is possible to prevent the field oxide film 100 from digging into the active element region as in the prior art, and a MOS can be obtained.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to eliminate the formation of a field oxide film, and compensate in advance for the oxide film digging into the active element region, thereby suppressing the loss of the active element region. Therefore, it can greatly contribute to increasing the density of integrated circuit devices.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(e) are process flow diagrams showing one embodiment of the present invention. 1...Silicon substrate, 2...Silicon oxide film, 3...Silicon nitride film, 4...
・Polycrystalline silicon no, 5... Silicon nitride film, 6... Photoresist film, 7... Silicon oxide film, 8... Impurity ion, 9 ...
...Impurity implantation region, 10...Thick film field acid (C) 1st I\I (d!2 Figure 1)

Claims (1)

[Claims] a step of laminating a heat-resistant film and a polycrystalline silicon layer on a semiconductor substrate; a step of selective thermal oxidation of the polycrystalline silicon layer to convert a part of the polycrystalline silicon layer into a silicon oxide film; A semiconductor device comprising: forming a heat-resistant mask pattern for selectively etching the heat-resistant film using a silicon oxide film as a mask; and selectively thermally oxidizing the semiconductor substrate using the heat-resistant mask pattern. How to form a separation area.