JPS63129675A - Method for forming gate electrode of field effect transistor - Google Patents

Abstract

PURPOSE:To prevent the damage of a substrate and to improve insulating characteristics, by forming an opening part for providing a gate electrode and the like on a substrate by using an electron cyclotron resonance plasma CVD method. CONSTITUTION:A photoresist film 2 is applied on a substrate 1. A pattern is exposed and developed to form a resist pattern. Then an Si3N4 film is formed by using a mixed gas of SiH4, NH3 and N2 by an electron cyclotron resonance plasma CVD method. Then the resist pattern is removed by wet etching. Lift-off is performed, and an insulating film 3 having an opening part is formed. Then, an annealing protecting film 6 is formed, and annealing is performed. After an ion implanted layer is activated, the film 6 is removed by wet etching. A gate electrode 5 is formed by lift-off. Thus the substrate 1 is not damaged, and the insulating layer is not deteriorated with heat.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of forming a gate electrode of a field effect transistor.

BACKGROUND OF THE INVENTION A field effect transistor is a semiconductor device having two electrodes called a source and a drain, which are in ohmic contact with a semiconductor substrate, and a control electrode called a gate.
It has become widely used today. In such field effect transistors, Si3N, a film or S
An insulating film such as an iO□ film is provided on a semiconductor substrate.

A conventional method of forming such an insulating film pattern on a substrate and providing an electrode such as a gate electrode thereon will be explained with reference to FIG.

As shown in FIG. 2(a), first, Si3N is applied to the entire surface of the substrate 1.
An insulating film 3 such as 4 or SlO□ is formed by a CVD method, a spackle method, or the like. Next, resist film 2 is applied (second
(see Figure et al.). As shown in FIG. 2(C), the resist film 2 is exposed and developed in a predetermined pattern to obtain a resist pattern. Next, after removing a portion of the insulating film 3 using reactive ion etching (FIG. 2(d)), the resist film 2 is flushed with a solvent to form an opening as shown in FIG. 2(e). Obtain an insulating film pattern. A gate electrode 5 as shown in FIG. 2(f) was formed in a region including the opening where the insulating film was removed.

Problems to be Solved by the Invention However, since the conventional method uses a reactive ion etching method, the ion bombardment may damage the substrate directly below the ion-etched insulating film, or cause foreign matter to be removed. There was a problem with adhesion. For this reason, if an electrode is provided in the portion opened by the ion etching, the electrical characteristics of the Schottky gate will deteriorate.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for forming a gate electrode of a field effect transistor that does not damage the underlying crystal substrate and has good insulation properties.

Means for Solving the Problems As a result of intensive study and research by the present inventors in order to solve the above-mentioned conventional problems, the present inventors discovered that electron cyclotron resonance (ECR)
We have discovered a method for forming gate electrodes of field-effect transistors with good insulation properties without damaging the substrate, which is the base of the insulating film pattern, by using the plasma CVD method (hereinafter referred to as the ECR plasma CVD method). Ta.

That is, according to the present invention, a resist film is coated on a semiconductor substrate, a resist pattern is formed by lithography, ions are implanted on both sides of the resist in a self-aligned manner to form an implanted ion layer, and an ECR is applied on the substrate. An insulating film is formed by a resonance plasma CVD method, and then the resist pattern and the insulating film thereon are removed by lift-off to form an insulating film pattern having openings, and a protective film for annealing is formed on the entire surface of the substrate. A field effect transistor comprising the steps of activating the implanted ion layer by annealing, removing the protective film by wet etching, and forming a gate electrode in the opening by lift-off. A method of forming a gate electrode is provided.

The method of the present invention can be satisfactorily used even for electrodes with gate lengths of submicrons, and is particularly suitable for manufacturing high-performance transistors with short gate lengths.

The present invention will be explained with reference to FIG. FIG. 1 shows a specific example of a method for forming a gate electrode of a field effect transistor according to the present invention, but the present invention is not particularly limited thereto.

First, in FIG. 1(a), a resist film 2 such as a photoresist is coated on a substrate 1 made of GaAs, etc., and then a predetermined pattern is exposed and developed to form a resist pattern as shown in FIG. form. Next, N° ion implantation is performed using the resist pattern formed on the substrate 1 as a mask to form an ion implantation layer 4 in a self-aligned manner (FIG. 1(C)).

Next, an insulating film 3 of Si, N4, etc. is formed on such a substrate by ECR plasma CVD method (see FIG. 1(d)).
)). This insulating film 3 is hardly formed on the side surfaces of the resist pattern due to the directional characteristics of the ECR plasma method.

Next, the remaining resist pattern is lifted off by wet etching to form an insulating film pattern, thereby obtaining an insulating film pattern having openings as shown in FIG. 1(e).

Furthermore, as shown in FIG. 1(f), a protective film 6 for annealing is formed on the entire surface of this substrate using the ECR plasma CvD method.
The ion-implanted layer 4 is deposited by a method such as a Bata method, a plasma CVD method, or a normal pressure or low pressure CVD method, and is then annealed in, for example, N2 to activate the ion-implanted layer 4. .

Next, the protective film 6 is removed by wet etching to obtain a substrate with an insulating film pattern having openings as shown in FIG. 1(g). Next, an electrode material such as Ti/Pt/Au is deposited in the region including the opening of the insulating film pattern, thereby forming a gate electrode 5 as shown in FIG.

The ECR plasma CVD method used in the present invention is described in the Japanese Journal of Applied Physics (Japanese Journal of Applied Physics).
pplied Physics), Volume 22, No. 210
ECR plasma CVD disclosed in Page, 1983
It uses equipment.

An ECR plasma CVD apparatus includes a plasma chamber and a reaction chamber (sample), and the plasma chamber is connected to a microwave waveguide via a partition plate, and an electromagnet is installed around the waveguide to transmit microwaves into the plasma chamber. With this, ECR conditions can be established and a divergent magnetic field can be created to draw out plasma within the reaction chamber. This plasma chamber is connected to the reaction chamber via a plasma extraction window, and plasma is accelerated and guided by a divergent magnetic field toward a sample placed on a sample stage.

According to this device, N2.02, NH8, or a mixture thereof is sent into a plasma chamber in which ECR conditions are set using microwaves and a magnetic field, and the plasma gas is guided by a divergent magnetic field and flows into the reaction chamber. sent to. On the other hand, there is a substrate placed on a sample stage in the reaction chamber, and a raw material gas for forming an insulating film such as SiH4, 5i3Ha, 5I2H8 is supplied to the reaction chamber, and this is excited and activated by the plasma to cause a reaction. A predetermined reaction product is deposited on the substrate.

As an insulating film formed by ECR plasma method, SI
3N4, SiO2, and silicon nitride oxide films are preferred.

Further, in the present invention, as a means for forming the above-mentioned protective film for annealing, ECR plasma method, plasma CV
It is preferable to use a method selected from D method, normal pressure or low pressure CVD method, and sputtering method.

In the process of manufacturing a working field effect transistor or the like, it is necessary to pattern an insulating film having an opening for providing a gate electrode or the like on a substrate.

In the conventional method, an insulating film is formed on the entire surface of the substrate by plasma CVD, normal pressure or low pressure CVD, sputtering, etc., a resist pattern is formed on the insulating film, and then reactive ion etching is used to remove part of the insulating film. The pattern of the insulating film was formed by removing the portion.

However, when reactive ion etching is used, there is a drawback that the crystal substrate underlying the insulating film etched by the reactive plasma is damaged.

However, since the present invention uses the ECR plasma CVD method, patterning of the insulating film can be easily performed by lift-off, and there is no need to use reactive ion etching. The ECR plasma CVD method has the advantage of being able to form a film at a low temperature, and because the directivity of the plasma toward the substrate is excellent, no film is formed in areas other than the direction from the plasma to the substrate, that is, on the sides of the substrate or pattern. Therefore, lift-off can be performed extremely easily compared to other film forming methods such as CVD.

Furthermore, the ECR plasma CVD method provides a film that is produced with good film quality and excellent etching resistance, does not peel off even after annealing at about 800° C., and provides an excellent film that suppresses the diffusion of Ga and As.

According to the method for forming an insulating film of the present invention, the substrate 1'', which is the base for providing the gate electrode, etc., is not damaged, so the contact resistance between the electrode and the substrate is reduced, and the contact resistance during etching is reduced. A good insulation function is achieved because no foreign matter is attached.

Further, if the patterned insulating film obtained as described above is easily damaged when the insulating film is annealed, an annealing protective film is formed over the entire surface of the substrate according to the present invention. Thereafter, by annealing and removing it by wet etching, a good insulating film pattern can be obtained between the gate and source and between the gate and drain.

EXAMPLES Next, the present invention will be explained in detail by examples, but the present invention is not limited thereto.

Example 1 A gate electrode of a field effect transistor was formed on a substrate in the following manner according to the process of the present invention as shown in FIG.

First, a GaAs substrate is used as a semiconductor substrate, and a photoresist film (AZ-1400) is applied over the entire surface.
After exposing the pattern, it was developed to form a resist pattern. Next, using the resist formed on the substrate as a mask, the implanted ions were 28Sl+, and the implantation concentration was 3×1013.
Ion implantation was performed at a concentration of about /crl. Next, E.C.
5iH1, N H3 and N2 by R plasma CVD equipment
A Si3N film was formed using a mixed gas of about 1500 nm thick. Next, the mask of the resist pattern was removed by wet etching, and lift-off was performed to form an insulating film pattern.

Next, a 513N4 film with a thickness of 1000 mm was formed on the entire surface of the substrate by plasma CVD as an annealing protective film.
After forming it to a thickness of A, it was annealed in an electric furnace in N2. Then, the protective film was removed by wet etching. Furthermore, this insulating film pattern covers the entire surface of the substrate, including the exposed part, with Ti/Pt/A.
A U-based electrode material was deposited and a gate electrode was formed by a lift-off method.

In order to investigate the function of the insulating film thus formed, source and drain electrodes were provided on the substrate on which the gate electrode was formed, and the mutual conductance (g) was measured and found to be 230 m5/mm.

Comparative Example The GaAs substrate provided with the Si, N, insulating film and gate electrode prepared in Example 1 was prepared as follows by a conventional method using reactive ion etching as shown in FIG.

GaAs was ion-implanted using the same method as in Example 1.
A Si3N film having a thickness of 1500 nm was formed on the substrate using a plasma CVD method. A resist film (A
Z-1400) was applied, exposed according to the pattern, and created a resist pattern by wet etching.
CF using reactive ion etching method, S using gas
The i3N4 film was etched. Thereafter, a gate electrode was formed on the patterned insulating film in the same manner as in Example 1, and source and drain electrodes were provided to increase the mutual conductance (g
, ) was measured and found to be 170 m5/mm.

Effects of the Invention By using the method of the present invention, a gate electrode of a field effect transistor having good insulation properties can be formed without damaging a crystal substrate. Furthermore, by performing annealing treatment using an annealing protective film, deterioration of the insulating layer due to heat can be effectively prevented.

Therefore, the field effect transistor manufactured by the method of the present invention has good electrical characteristics and has extremely high industrial value.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the steps of a method for forming a gate electrode of a field effect transistor according to the present invention. FIG. 2 is a diagram showing the steps of a conventional method for forming a gate electrode of a field effect transistor. (main reference number)

Claims (1)

[Claims] (1) After coating a resist film on a semiconductor substrate and forming a resist pattern by lithography, ions are implanted on both sides of the resist in a self-aligned manner to form an implanted ion layer; Electron cyclotron resonance plasma CV on top
An insulating film is formed by the D method, and then the resist pattern and the insulating film thereon are removed by lift-off to form an insulating film pattern having openings, and a protective film for annealing is formed on the entire surface of the substrate, followed by annealing. A gate electrode for a field effect transistor, comprising a step of activating the implanted ion layer through processing, removing the protective film by wet etching, and further forming a gate electrode in the opening by lift-off. How to form. (3) Claim 1 or 2, wherein the annealing protective film is formed by a method selected from electron cyclotron resonance plasma CVD, plasma CVD, CVD, and sputtering. A method for forming a gate electrode of a field effect transistor as described in . (4) The method for forming a gate electrode of a field effect transistor according to any one of claims 1 to 3, wherein the semiconductor substrate is a III-V group compound semiconductor. (5) A method for forming a gate electrode of a field effect transistor according to claim 4, wherein the III-V compound semiconductor is GaAs.