JPH06151381A - Creation of metal pattern - Google Patents

Abstract

PURPOSE:To process a gate electrode of a very high speed FET without damage by etching an uncovered Al-containing W film or WSI film on a metal pattern, by exposing a sample's surface to an F-containing etching gas after the F- containing etching gas has been heated within a specific range by heating a compound semiconductor substrate to a specific temperature. CONSTITUTION:A resist mask 104 is created on a WSi film 102 and an Al film 103 formed on a GaAs layer 101. Then, the Al film 103 that is exposed below the resist mask 104 by dry etching using a chlorine-based gas is etched. A sample from which the resist mask 104 has been removed is introduced into an etching chamber that is evacuated to a high vacuum. A surface of the sample is exposed to an F2 gas heated within the range between 100 to 1000 deg.C while a half-insulating GaAs substrate 100 is heated within the range between 300-600 deg.C. A WSi film 102 exposed below on the Al film 103 is etched and then subjected to patterning.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for forming electrodes of a compound semiconductor circuit such as GaAs, and more particularly to a technique for forming a pattern of refractory metal on a compound semiconductor layer.

[0002]

2. Description of the Related Art A technique for forming a refractory metal pattern on a compound semiconductor layer is described in, for example, Journal of Applied Physics Vol. 67, No. 6 (1990) 2
Reported on pages 836 to 2839. In this technique, a sample having a resist mask formed on a refractory metal W or WSi film on a GaAs substrate is introduced into an etching chamber, and then SF ₆ gas which has been subjected to μ wave discharge is introduced into an etching chamber which is evacuated to a reduced pressure atmosphere. The radicals and ions generated by the wave discharge are vertically incident on the surface of the refractory metal W or WSi exposed from the mask by applying an RF bias to anisotropically etch the refractory metal film.

[0003]

Using the [0006] SF ₆ gas μ
In the wave plasma etching technique, radicals and ions are incident on the GaAs surface after the etching of the refractory metal film exposed from the mask is completed. The magnitude of the energy of radicals and ions is usually several tens eV or more depending on the RF bias and the like, which damages the GaAs surface. Ga
Damage on the As surface becomes a fatal problem as the device becomes finer and thinner.

[0004]

Means for Solving the Problems After forming a W or WSi film on a compound semiconductor substrate mainly composed of GaAs, a metal pattern containing Al is formed on the W or WSi film. Then, the compound semiconductor substrate is heated to 300 to 600 ° C.
The etching gas containing F is heated to 100-100
After heating in the range of 0 ° C., the sample surface is irradiated to etch the W or WSi film exposed from the metal pattern containing Al.

[0005]

In the present invention, the W or WSi film is etched by 1
An etching gas heated in the range of 00 to 1000 ° C. is used. The energy of the heated etching gas or fragment is 1 eV or less, which is much smaller than the energy of radicals and ions in the conventional plasma etching. Therefore, the damage to the GaAs surface after the W or WSi film is removed by etching is negligibly small.

[0006]

【Example】

<Embodiment 1> An embodiment of the present invention will be described with reference to the process chart shown in FIG. MBE on semi-insulating GaAs substrate 100
After forming the GaAs layer 101 by the MOCVD method or the MOCVD method, the WSi film 102 and the Al film 103 are formed by the sputtering method or the vapor deposition method (a). Next, a resist mask 104 is formed by a lithography technique, and then a resist mask 1 is formed by dry etching using a chlorine-based gas.
The Al film 103 exposed from 04 was etched (b). Then, the sample from which the resist mask 104 was removed was introduced into an etching chamber evacuated to a high vacuum. afterwards,
F ₂ heated in the range of 100 to 1000 ° C. in a state where the semi-insulating GaAs substrate 100 is heated to 300 to 600 ° C.
The surface of the sample was irradiated with gas, and the WSi film 102 exposed from the pattern of the Al film 103 was etched and patterned (c). Here, the Al film 103 is the WSi film 102.
It is used as a mask during etching and may be removed according to the necessity in the subsequent process. Also, Al
The same effect can be obtained by using a metal film mask containing other Al such as TiAl instead of the film 103.

According to this embodiment, the high melting point metal WSi
The film 102 can be patterned without damaging the underlying GaAs layer 101. Such a patterning technique for the undamaged WSi film 102 is a GaAs FET using an extremely thin channel layer, especially a HEMT (High Electron Mobilit) utilizing a heterojunction.
y Transistor) and HIGFET (Heterostructure Insu
It is extremely effective in processing the gate electrode of the lated gate FET).

In the embodiment, the patterning (b) of the Al film 103 and the patterning (c) of the WSi film 102 are separately performed, but the Al film 1 is formed by dry etching.
After patterning a part of the WSi film 102 subsequent to the patterning of No. 03, the resist mask 104 is removed and the WSi film 102 is patterned by the heated F ₂ gas to obtain the same effect. Further, although the WSi film 102 is etched by the heated F ₂ in the embodiment, the same effect can be obtained by using other gas containing F such as SF ₆ and CF ₄ . While these gases are easy to handle, they have the drawback of easily contaminating the equipment and sample.

Although the patterning of the WSi film 102 is described in this embodiment, the same effect can be obtained by applying it to a W film or a laminated film of WSi film and W film.

<Embodiment 2> An embodiment of the present invention will be described with reference to the process chart shown in FIG. Semi-insulating GaAs substrate 20
0 on the GaAs layer 2 by MBE or MOCVD
After forming 01, the WSi film 202 was formed by the sputtering method (a). Then, an Al film 203 pattern was formed by the lithography technique and the lift-off method (b). Then, the sample was introduced into an etching chamber evacuated to a high vacuum.
Then, the semi-insulating GaAs substrate 200 is set to 300-600.
The surface of the sample was irradiated with F ₂ gas heated in the range of 100 to 1000 ° C. while being heated to 0 ° C., and the WSi film 202 exposed from the pattern of the Al film 203 was etched and patterned (c). Here, the Al film 203 is the WSi film 2
02 It is used as a mask during etching and may be removed according to the necessity in the subsequent process. Also,
The same effect can be obtained by using a metal film mask containing other Al such as TiAl instead of the Al film 203.

According to this embodiment, the high melting point metal WSi
It is possible to pattern the film 202 without damaging the underlying GaAs layer 201. Such a technique for patterning the undamaged WSi film 202 is extremely effective in processing the gate electrode of a GaAs-based FET using an extremely thin channel layer, particularly HEMT and HIGFET utilizing a heterojunction.

Further, although the WSi film 202 is etched by the heated F ₂ in the above-described embodiment, SF is used.
The same effect can be obtained by using other gas containing F such as ₆ , CF _{4 and the} like. While these gases are easy to handle, they have the drawback of easily contaminating the equipment and sample.

Further, although the patterning of the WSi film 202 is described in the present embodiment, the same effect can be obtained by applying it to the W film or the laminated film of the WSi film and the W film.

[0014]

According to the present invention, the high melting point metal WSi
It has become possible to pattern the film or W film without damaging the underlying GaAs layer. Therefore, the processing of the gate electrode of the ultra-high-speed GaAs FET having an extremely thin channel layer can be performed without adversely affecting the channel layer.

[Brief description of drawings]

FIG. 1 is a sectional view showing a process of a first embodiment of the present invention.

FIG. 2 is a sectional view showing a process of a second embodiment of the present invention.

[Explanation of symbols]

100 ... Semi-insulating GaAs substrate, 101 ... GaAs layer,
102 ... WSi film, 103 ... Al film, 104 ... Resist mask.

Claims (4)

[Claims] 1. A step of forming a W or WSi film on a compound semiconductor substrate, a step of forming a metal pattern containing Al on the W or WSi film, and 3 steps of forming the compound semiconductor substrate.
The gas containing F is heated to 100 to 600 ° C.
After heating in the range of up to 1000 ° C., the sample surface is irradiated and the above A
1. A method of forming a metal pattern, comprising a step of etching a W or WSi film exposed from a metal pattern containing l. 2. The method according to claim 1, wherein the step of forming a metal pattern containing Al on the W or WSi film includes the step of forming a metal film containing Al on the W or WSi film, and lithography and etching techniques. A method of forming a metal pattern, comprising the step of forming a pattern on the metal film containing Al. 3. The step of forming a metal pattern containing Al on the W or WSi film according to claim 1, wherein the step of forming a pattern on the metal film containing Al on the W or WSi film is performed by lithography and a lift-off technique. A method for forming a metal pattern including :. 4. The compound semiconductor according to claim 1, wherein the compound semiconductor is G.
A method for forming a metal pattern, which is a III-V compound semiconductor typified by aAs, and in which the gas containing F is F ₂ .