JPH06163399A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

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Publication number
JPH06163399A
JPH06163399A JP31543792A JP31543792A JPH06163399A JP H06163399 A JPH06163399 A JP H06163399A JP 31543792 A JP31543792 A JP 31543792A JP 31543792 A JP31543792 A JP 31543792A JP H06163399 A JPH06163399 A JP H06163399A
Authority
JP
Japan
Prior art keywords
substrate
film
heteroepitaxial growth
insulating film
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31543792A
Other languages
Japanese (ja)
Inventor
Akihiro Kishimoto
晃弘 岸本
Jun Tokuda
潤 徳田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP31543792A priority Critical patent/JPH06163399A/en
Publication of JPH06163399A publication Critical patent/JPH06163399A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a method of fabricating a semiconductor substrate wherein heteroepitaxial growth is selectively achieved without causing any damage on a Si substrate. CONSTITUTION:An insulating film 2 is formed on a Si substrate 1, and is thereafter partly removed by irradiating it with a radical only at a portion where heteroepitaxial growth is effected. Further, only an exposed surface of the Si substrate 1 is selectively rendered to heteroepitaxial growth to form a compound semiconductor layer 3 and the like.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、半導体の製造方法、
特にSi基板上に選択的にヘテロエピタキシャル成長を
行う工程を含む半導体基板の製造方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing method,
In particular, the present invention relates to a method for manufacturing a semiconductor substrate including a step of selectively performing heteroepitaxial growth on a Si substrate.

【0002】[0002]

【従来の技術】従来、Si基板上に選択的にヘテロエピ
タキシャル成長を行う工程を含む半導体基板の製造方法
においては、たとえば、図2の(a)に示すように、S
i基板1上に絶縁膜2としてSiO2 を形成する。Si
2 の形成は、周知のCVD法によって行う。これは、
例えば、SiH4 とO2 を300〜400°Cで反応さ
せることで行う。次に、ヘテロエピタキシャル成長を行
う箇所のSiO2 を除去するためにフォトレジスト加工
が行われる。まず、図2の(b)に示すように、ウェー
ハ表面に均一な厚みでフォトレジスト膜4を塗布形成
し、次に、塗布されたフォトレジスト膜4に残っている
有機溶剤を除き乾燥させて適当に硬化させるために、8
0°C前後に温度を上げてプリベーキングを行う。そし
て、必要な部分に光を当てるためにフォトマスク5をウ
ェーハ表面に合わせて紫外線によって露光する。図2の
(c)における、5aがフォトマスク5のパターン部分
であり、4aがレジスト膜4内の未露光部分である。そ
して、溶剤で不要なフォトレジスト膜(未露光部分)を
取り除くと、図2の(d)にみるように、フォトマスク
のパターンがフォトレジストに転写される。そののち、
現像によって柔らかくなったフォトレジスト膜を硬化さ
せて基板との密着性を良くするために、150°C前後
の温度に上げてポストベーキングを行う。
2. Description of the Related Art Conventionally, in a method of manufacturing a semiconductor substrate including a step of selectively performing heteroepitaxial growth on a Si substrate, as shown in FIG.
SiO 2 is formed as an insulating film 2 on the i substrate 1. Si
The formation of O 2 is performed by the well-known CVD method. this is,
For example, it is performed by reacting SiH 4 and O 2 at 300 to 400 ° C. Next, photoresist processing is performed in order to remove SiO 2 in the portion where heteroepitaxial growth is performed. First, as shown in FIG. 2B, a photoresist film 4 having a uniform thickness is applied and formed on the wafer surface, and then the organic solvent remaining on the applied photoresist film 4 is removed and dried. 8 for proper curing
Prebaking is performed by raising the temperature to around 0 ° C. Then, the photomask 5 is exposed to ultraviolet rays so that the photomask 5 is aligned with the surface of the wafer in order to apply light to necessary portions. In FIG. 2C, 5a is a pattern portion of the photomask 5, and 4a is an unexposed portion in the resist film 4. Then, when the unnecessary photoresist film (unexposed portion) is removed with a solvent, the pattern of the photomask is transferred to the photoresist, as shown in FIG. after that,
In order to cure the photoresist film softened by the development and improve the adhesion with the substrate, the temperature is raised to around 150 ° C. and post-baking is performed.

【0003】次に、残ったフォトレジスト膜4を保護膜
としてプラズマエッチングによってウェハ表面のSiO
2 膜2を図2の(e)に示すようにエッチング除去す
る。このエッチングには通常CF4 ガスが用いられてい
る。最後に、硬化したフォトレジスト膜4を溶剤あるい
はプラズマアッシャーなどの方法で図2の(f)に示す
ように除去し、ウェハを洗浄する。これでSi基板1上
にはフォトマスクのパターンどおりにエッチングされた
膜2が残り、他の部分のSi表面はむき出しとなる。こ
のウェーハの上に、図2の(g)に示すように、例えば
MOMBE法、あるいは、MOCVD法により化合物半
導体3を選択的にヘテロエピタキシャル成長させる。
Next, the remaining photoresist film 4 is used as a protective film to perform plasma etching on the wafer surface to form SiO 2.
2 The film 2 is removed by etching as shown in FIG. CF 4 gas is usually used for this etching. Finally, the hardened photoresist film 4 is removed by a method such as a solvent or plasma asher as shown in FIG. 2F, and the wafer is washed. As a result, the film 2 etched according to the pattern of the photomask remains on the Si substrate 1, and the Si surface of the other part is exposed. As shown in FIG. 2G, the compound semiconductor 3 is selectively heteroepitaxially grown on this wafer by, for example, the MOMBE method or the MOCVD method.

【0004】[0004]

【発明が解決しようとする課題】しかし、上述のごと
く、絶縁膜を除去するためにフォトレジスト加工を行い
プラズマエッチングを行うと、プラズマ中のイオンや電
子の衝撃でSi表面に損傷を与えてしまう。すでにSi
基板の上に素子が作成されている場合には、性能の劣化
や素子の破壊につながる。特にMOS素子の場合には、
ゲート絶縁膜が破壊されてしまう。
However, as described above, when the photoresist processing is performed to remove the insulating film and the plasma etching is performed, the Si surface is damaged by the impact of ions and electrons in the plasma. . Already Si
If the element is formed on the substrate, it leads to deterioration of performance and destruction of the element. Especially in the case of MOS devices,
The gate insulating film is destroyed.

【0005】この発明は、このような事情に鑑みて、S
i基板上に損傷を与えることなく選択的にヘテロエピタ
キシャル成長を行う方法を提供することを課題とするも
のである。
In view of such a situation, the present invention is based on S
It is an object of the present invention to provide a method for selectively performing heteroepitaxial growth on an i substrate without damaging it.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
に、この発明は、Si基板上に選択的にヘテロエピタキ
シャル成長を行う工程を含む半導体基板の製造方法であ
って、Si基板上に絶縁膜を形成し、そののち、ヘテロ
エピタキシャル成長を行う箇所にのみラジカルを照射し
て前記の絶縁膜を部分的に除去し、露出されたSi基板
表面に対してのみ選択的にヘテロエピタキシャル成長を
行うことを特徴とする。つまり、この発明の場合、絶縁
膜の除去をラジカル照射により行うようにするのであ
る。
In order to solve the above problems, the present invention is a method of manufacturing a semiconductor substrate including a step of selectively performing heteroepitaxial growth on a Si substrate, which comprises an insulating film on the Si substrate. Is formed, and thereafter, the insulating film is partially removed by radiating the radicals only to the portion where the heteroepitaxial growth is performed, and the heteroepitaxial growth is selectively performed only on the exposed Si substrate surface. And That is, in the case of the present invention, the removal of the insulating film is performed by radical irradiation.

【0007】この発明で選択的にヘテロエピタキシャル
成長を行うSi基板としては、特定のものに限らず、全
く未加工のものの他、絶縁ゲート型のMOS半導体素子
などが作成されているSi基板の場合もある。ヘテロエ
ピタキシャル成長層としては、GaAsなどの化合物半
導体層が挙げられる。
The Si substrate for selectively performing heteroepitaxial growth according to the present invention is not limited to a specific one, but may be an unprocessed one or an Si substrate on which an insulated gate type MOS semiconductor element or the like is formed. is there. Examples of the heteroepitaxial growth layer include compound semiconductor layers such as GaAs.

【0008】[0008]

【作用】ラジカル照射で絶縁膜の除去を行えば、レジス
トを用いることなく絶縁膜を除去することができる。ラ
ジカルによる絶縁膜除去では、イオンや電子によるSi
表面の損傷が起きない。ヘテロエピタキシャル成長をM
OMBE法で行う場合、マルチチャンバ装置で本製造工
程を行うことができるので、その間、基板を1度も大気
にさらさずに済む。そのため、酸化膜が形成されずに済
み、酸化膜の除去のために温度を高温にする必要がな
く、成長温度の低温化が行える。
If the insulating film is removed by radical irradiation, the insulating film can be removed without using a resist. In removing the insulating film by radicals, Si by ions or electrons
No surface damage. Heteroepitaxial growth M
When the OMBE method is used, the main manufacturing process can be performed using a multi-chamber apparatus, and during that time, the substrate need not be exposed to the atmosphere even once. Therefore, the oxide film is not formed, it is not necessary to raise the temperature to remove the oxide film, and the growth temperature can be lowered.

【0009】[0009]

【実施例】以下、この発明の実施例について説明する。
図1はこの発明の一実施例を示している。まず、図1の
(a)に示すように、周知のCVD法によってSi基板
1上にSiO2 膜2を形成する。次に、図1の(b)に
示すように、ヘテロエピタキシャル成長を行う箇所のS
iO2 膜2を矢印で示す水素ラジカルを用いて除去す
る。一般に、水素等の気体に電界をかけてプラズマを励
起すると、イオン、電子およびラジカルの集団を形成す
ることができる。そこで、プラズマ発生源と試料との間
に、正と負の電界をかけることのできる電極を配置する
と、イオンと電子は電極を通過できずラジカルのみ引き
出すことができる。このラジカルを用いて、Si基板1
上の任意の場所のSiO2 膜2を取り除く。図形にした
がったエッチングをしようとする場合は、基板1のある
試料台(図示省略)を動かしてやれば良い。このように
うしてSiO2 膜を取り除いた場所に、図1の(c)に
示すように、MOMBE法やMOCVD法によって化合
物半導体層3を選択的に成長させる。
Embodiments of the present invention will be described below.
FIG. 1 shows an embodiment of the present invention. First, as shown in FIG. 1A, a SiO 2 film 2 is formed on a Si substrate 1 by a known CVD method. Next, as shown in FIG. 1B, the S
The iO 2 film 2 is removed using hydrogen radicals shown by the arrows. Generally, when an electric field is applied to a gas such as hydrogen to excite plasma, a group of ions, electrons and radicals can be formed. Therefore, by disposing an electrode capable of applying a positive and negative electric field between the plasma generation source and the sample, ions and electrons cannot pass through the electrode and only radicals can be extracted. Using this radical, the Si substrate 1
The SiO 2 film 2 at an arbitrary place above is removed. When etching according to a pattern is to be performed, a sample stage (not shown) on which the substrate 1 is provided may be moved. In this way, the compound semiconductor layer 3 is selectively grown by the MOMBE method or the MOCVD method at the place where the SiO 2 film is removed, as shown in FIG.

【0010】上述した実施例では、絶縁膜としてSiO
2 を用いているが、絶縁膜であればこれに限定されるも
のではなく、また、その形成方法も限定されない。ま
た、上述した実施例では、ラジカル発生源として水素ガ
スを用いているが、絶縁膜をエッチングできるガスであ
れば、任意のガスによることができる。さらに、Si基
板上に成長させる物質は、化合物半導体に限ったもので
はなく、エピタキシャル成長可能な物質であればどのよ
うなものでもよい。
In the above-described embodiment, SiO is used as the insulating film.
Although 2 is used, it is not limited to this as long as it is an insulating film, and the forming method is not limited. Further, in the above-described embodiments, hydrogen gas is used as a radical generation source, but any gas can be used as long as it can etch the insulating film. Furthermore, the substance grown on the Si substrate is not limited to the compound semiconductor, and any substance that can be epitaxially grown may be used.

【0011】[0011]

【発明の効果】この発明によれば、上記のように、絶縁
膜をラジカルによって除去しているので、フォトレジス
ト加工の工程がなくて済み、工程を簡略化できる。ま
た、MOMBE法によってヘテロエピタキシャル成長を
行う場合に、基板を大気にさらすことがないので、エピ
タキシャル成長時の成長温度の低温化が行える。さら
に、絶縁膜の除去にラジカルを用いているので、イオン
や電子によるSi表面の損傷が起きない。
As described above, according to the present invention, since the insulating film is removed by the radicals as described above, the step of photoresist processing is not required and the steps can be simplified. Further, when performing heteroepitaxial growth by the MOMBE method, the substrate is not exposed to the atmosphere, so that the growth temperature during epitaxial growth can be lowered. Furthermore, since radicals are used to remove the insulating film, the Si surface is not damaged by ions or electrons.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例の製造工程を示す断面図であ
る。
FIG. 1 is a cross-sectional view showing a manufacturing process of an embodiment of the present invention.

【図2】従来の製造工程を示す断面図である。FIG. 2 is a cross-sectional view showing a conventional manufacturing process.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 SiO2 膜 3 化合物半導体層1 semiconductor substrate 2 SiO 2 film 3 compound semiconductor layer

【手続補正書】[Procedure amendment]

【提出日】平成5年2月1日[Submission date] February 1, 1993

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0009[Correction target item name] 0009

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0009】[0009]

【実施例】以下、この発明の実施例について説明する。
図1はこの発明の一実施例を示している。まず、図1の
(a)に示すように、周知のCVD法によってSi基板
1上にSiO膜2を形成する。次に、図1の(b)に
示すように、ヘテロエピタキシャル成長を行う箇所のS
iO膜2を矢印で示す水素ラジカルを用いて除去す
る。一般に、水素等の気体に電界をかけてプラズマを励
起すると、イオン、電子およびラジカルの集団を形成す
ることができる。そこで、プラズマ発生源と試料との間
に、正と負の電界をかけることのできる電極を配置する
と、イオンと電子は電極を通過できずラジカルのみ引き
出すことができる。このラジカルを用いてSi基板1上
の任意の場所のSiO膜2を取り除く。図形にしたが
ってエッチングをしようとする場合は、基板1のある試
料台(図示省略)を動かしてやれば良い。このようにし
SiO膜を取り除いた場所に、図1の(c)に示す
ように、MOMBE法やMOCVD法によって化合物半
導体層3を選択的に成長させる。
Embodiments of the present invention will be described below.
FIG. 1 shows an embodiment of the present invention. First, as shown in FIG. 1A, a SiO 2 film 2 is formed on a Si substrate 1 by a known CVD method. Next, as shown in FIG. 1B, the S
The iO 2 film 2 is removed using hydrogen radicals shown by the arrows. Generally, when an electric field is applied to a gas such as hydrogen to excite plasma, a group of ions, electrons and radicals can be formed. Therefore, by disposing an electrode capable of applying a positive and negative electric field between the plasma generation source and the sample, ions and electrons cannot pass through the electrode and only radicals can be extracted. This radical is used to remove the SiO 2 film 2 at an arbitrary position on the Si substrate 1. When etching is to be performed according to a pattern, a sample stage (not shown) having the substrate 1 may be moved. Like this
As shown in FIG. 1C, the compound semiconductor layer 3 is selectively grown at the place where the SiO 2 film is removed by the MOMBE method or the MOCVD method.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 Si基板上に選択的にヘテロエピタキシ
ャル成長を行う工程を含む半導体基板の製造方法であっ
て、Si基板上に絶縁膜を形成し、そののち、ヘテロエ
ピタキシャル成長を行う箇所にのみラジカルを照射して
前記の絶縁膜を部分的に除去し、露出されたSi基板表
面に対してのみ選択的にヘテロエピタキシャル成長を行
うことを特徴とする半導体基板の製造方法。
1. A method for manufacturing a semiconductor substrate, which comprises a step of selectively performing heteroepitaxial growth on a Si substrate, wherein an insulating film is formed on the Si substrate, and then radicals are formed only at a portion where heteroepitaxial growth is performed. A method for manufacturing a semiconductor substrate, which comprises irradiating to partially remove the insulating film, and selectively performing heteroepitaxial growth only on the exposed Si substrate surface.
JP31543792A 1992-11-25 1992-11-25 Manufacture of semiconductor substrate Pending JPH06163399A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31543792A JPH06163399A (en) 1992-11-25 1992-11-25 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31543792A JPH06163399A (en) 1992-11-25 1992-11-25 Manufacture of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH06163399A true JPH06163399A (en) 1994-06-10

Family

ID=18065369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31543792A Pending JPH06163399A (en) 1992-11-25 1992-11-25 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH06163399A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012120871A1 (en) * 2011-03-07 2012-09-13 住友化学株式会社 Semiconductor substrate, semiconductor device, and method for manufacturing semiconductor substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012120871A1 (en) * 2011-03-07 2012-09-13 住友化学株式会社 Semiconductor substrate, semiconductor device, and method for manufacturing semiconductor substrate

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