JP2789262B2 - Method for forming an ion implantation active layer in a GaAs substrate - Google Patents

Method for forming an ion implantation active layer in a GaAs substrate

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Publication number
JP2789262B2
JP2789262B2 JP3061161A JP6116191A JP2789262B2 JP 2789262 B2 JP2789262 B2 JP 2789262B2 JP 3061161 A JP3061161 A JP 3061161A JP 6116191 A JP6116191 A JP 6116191A JP 2789262 B2 JP2789262 B2 JP 2789262B2
Authority
JP
Japan
Prior art keywords
gaas substrate
active layer
ion implantation
substrate
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3061161A
Other languages
Japanese (ja)
Other versions
JPH04274320A (en
Inventor
文明 日向
和義 浅井
達雄 青木
末広 杉谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP3061161A priority Critical patent/JP2789262B2/en
Publication of JPH04274320A publication Critical patent/JPH04274320A/en
Application granted granted Critical
Publication of JP2789262B2 publication Critical patent/JP2789262B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、GaAs基板中にキャ
リア濃度が均一なイオン注入能動層を再現性良く形成す
る方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an ion implantation active layer having a uniform carrier concentration in a GaAs substrate with good reproducibility.

【0002】[0002]

【従来の技術】GaAsを基板に用いた電界効果トラン
ジスタ(以下GaAsFET)は、半絶縁性基板表面に
ドナー元素をイオン注入し、これを熱処理して能動層を
形成し、製作するのが一般的である。注入したイオンを
活性化するには、800℃程度の高温での熱処理が必要
であり、処理中にGaAs基板から揮発性元素であるA
sが蒸発してGaAs基板表面が変質することを防ぐた
め、通常、保護膜としてSiN、SiO2 等の絶縁膜を
用いる。従って、これらの膜のGaAs基板への付着状
態は能動層特性、即ち、FET特性に大きく影響する。
2. Description of the Related Art Generally, a field effect transistor (hereinafter referred to as GaAsFET) using GaAs as a substrate is manufactured by ion-implanting a donor element into the surface of a semi-insulating substrate and heat-treating the donor element to form an active layer. It is. In order to activate the implanted ions, a heat treatment at a high temperature of about 800 ° C. is necessary, and during the treatment, a volatile element, A, is removed from the GaAs substrate.
In order to prevent s from evaporating and altering the surface of the GaAs substrate, an insulating film such as SiN or SiO 2 is usually used as a protective film. Therefore, the state of adhesion of these films to the GaAs substrate greatly affects the characteristics of the active layer, that is , the FET characteristics.

【0003】実際にGaAsFETを製作する場合、能
動層はGaAs基板表面全面ではなく、必要な所定の場
所にのみ形成する。これは、GaAs基板上に形成した
フォトレジストより成るマスクパタンを通して、イオン
注入することにより実現することができる。即ち、Ga
As基板上でイオン注入を必要としない場所にはフォト
レジストを残しておき、イオンがGaAs基板に到達し
ないようにする。イオン注入後、フォトレジストマスク
パタンは、酸素プラズマによる灰化処理、或いは、有機
薬品による溶解処理によって除去し、熱処理保護膜を堆
積して以後の処理を行う。この場合、イオン注入によっ
てフォトレジストが変質し、イオン注入条件によっては
上記処理でフォトレジストを完全に除去しきれないこと
が、従来しばしば生じていた。熱処理保護膜とGaAs
基板との間にフォトレジスト薄層が介在すると、熱処理
中に熱処理保護膜が部分的に剥離し、基板内での能動層
特性の不均一、或いは、基板間での能動層特性変動がも
たらされていた。
When a GaAs FET is actually manufactured, the active layer is formed only at a required predetermined place, not on the entire surface of the GaAs substrate. This can be realized by ion implantation through a mask pattern made of a photoresist formed on a GaAs substrate . That is , Ga
A photoresist is left on the As substrate where no ion implantation is required, so that the ions do not reach the GaAs substrate. After the ion implantation, the photoresist mask pattern is removed by an ashing process using oxygen plasma or a dissolution process using an organic chemical, and a heat treatment protective film is deposited to perform a subsequent process. In this case, the photoresist is deteriorated by ion implantation, by ion implantation conditions that can not be completely removed photoresist above process, was conventionally often generated. Thermal protection film and GaAs
When a thin photoresist layer is interposed between the substrate and the heat treatment protective film, the heat treatment protective film partially peels off during the heat treatment, resulting in non-uniform active layer characteristics within the substrate or fluctuation of the active layer characteristics between the substrates. It had been.

【0004】[0004]

【発明が解決しようとする課題】本発明の目的は、フォ
トレジスト残りを無くして熱処理保護膜を完全にGaA
s基板に密着させ、形成する能動層の特性を均一にする
ようにしたことを特徴とする、GaAs基板中にイオン
注入能動層を形成する方法を提供するものである。
SUMMARY OF THE INVENTION An object of the present invention is to completely remove GaAs by completely removing the photoresist by heat treatment.
An object of the present invention is to provide a method for forming an ion-implanted active layer in a GaAs substrate, characterized in that the active layer to be formed is brought into close contact with the s substrate to make the characteristics of the active layer uniform.

【0005】[0005]

【課題を解決するための手段】従来技術ではイオン注入
に用いるフォトレジストパタンをGaAs基板上に直接
形成していたのに対し、本発明ではGaAs基板上にま
ずInを構成元素に含むIII −V族化合物半導体薄膜を
堆積し、この後、従来同様の工程で能動層形成を行う。
この半導体薄膜はイオン注入、フォトレジスト除去
した後に塩酸系溶液で溶解除去する。Inを含むIII −
V族化合物半導体結晶は塩酸で容易にエッチングされる
が、GaAs結晶は全くエッチングされない。従って、
たとえ上記フォトレジスト残りが存在していても、これ
は塩酸系溶液によってIII −V族化合物半導体薄膜と共
にGaAs基板表面から除去され、上記熱処理保護膜は
GaAs基板と完全に密着することになる。従って、
発明の構成は以下に示す通りである。即ち、GaAs結
晶を基板(1)に用いて添加元素(4)をイオン注入
し、前記GaAs基板(1)を熱処理して前記GaAs
基板(1)中にイオン注入能動層(7)を形成する方法
において、 前記GaAs基板(1)表面にあらかじめI
nを構成元素に含むIII −V族化合物半導体薄膜(2)
を堆積する第1の工程(図1)と、 前記III −V族化合
物半導体薄膜(2)上にイオン注入マスク(3)を形成
しパターニングする第2の工程(図2)と、 前記GaA
s基板(1)に前記添加元素(4)をイオン注入する第
3の工程(図2)と、 前記III −V族化合物半導体薄膜
(2)及び前記イオン注入マスク(3)を除去する第4
の工程(図3)と、 前記GaAs基板(1)上に熱処理
保護膜(6)を形成する第5の工程(図4)と、 前記G
aAs基板(1)を熱処理する第6の工程(図4)とか
ら構成されることを特徴とするGaAs基板中(1)に
イオン注入能動層(7)を形成する方法としての構成を
有するものである。
According to the prior art, a photoresist pattern used for ion implantation is formed directly on a GaAs substrate. On the other hand, in the present invention, a III-V film containing In as a constituent element is first formed on a GaAs substrate. A group compound semiconductor thin film is deposited, and thereafter, an active layer is formed by a process similar to the conventional one.
After the semiconductor thin film ion implantation, the photoresist is removed
Then, it is dissolved and removed with a hydrochloric acid solution. III including In
The group V compound semiconductor crystal is easily etched by hydrochloric acid, but the GaAs crystal is not etched at all. Therefore,
Even if the photoresist remains, it is removed from the surface of the GaAs substrate together with the group III-V compound semiconductor thin film by the hydrochloric acid-based solution, and the heat treatment protective film is completely adhered to the GaAs substrate. Therefore, the book
The configuration of the invention is as follows. That is, GaAs
Implantation of additive element (4) using crystal as substrate (1)
Then, the GaAs substrate (1) is heat-treated to
Method for forming an ion-implanted active layer (7) in a substrate (1)
In the above , the surface of the GaAs substrate (1) is
III-V compound semiconductor thin film containing n as a constituent element (2)
A first step of depositing a (FIG. 1), the III -V group compound
Of ion implantation mask (3) on semiconductor thin film (2)
A second step of patterning (Fig. 2), the GaA
a second step of ion-implanting the additional element (4) into the s substrate (1);
Step 3 (FIG. 2) and the III-V compound semiconductor thin film
(2) and a fourth step of removing the ion implantation mask (3).
(FIG. 3) and heat treatment on the GaAs substrate (1)
A fifth step of forming a protective film (6) and (4), wherein G
The sixth step of heat-treating the aAs substrate (1) (FIG. 4)
(1) in the GaAs substrate characterized by comprising
The structure as a method of forming the ion implantation active layer (7) is as follows.
Have

【0006】[0006]

【実施例】GaAs結晶を基板として、Inを含むIII
−V族化合物半導体結晶薄膜にInGaP、イオン注入
用元素にSiを用いた場合の、本発明によるイオン注入
能動層の製作工程を実施例として、図1乃至図4に示
す。即ち、図1はGaAs基板上にInGaP薄膜を成
長する工程図(第1の工程)を示す。図2はフォトレジ
ストマスクパタンを形成後Si元素イオン注入層を形成
する工程図(第2及び第3の工程)を示す。図3はレジ
ストマシクパタンとInGaP薄膜を除去する工程図
(第4の工程)を示す。図4はSiN膜を熱処理保護膜
とする熱処理工程によりイオン注入能動層を形成する工
程図(第5及び第6の工程)を示す。以下に各工程を説
明する。GaAs基板1上にInGaP薄膜2を成長す
る(第1の工程)。この上にフォトレジストマスクパタ
ン3を形成し、Si元素4をイオン注入し、基板中にイ
オン注入層5を形成する(第2及び第3の工程)。この
後、酸素プラズマ処理によってフォトレジストマスクパ
タン3を灰化・除去した後、塩酸中に1−2分浸してフ
ォトレジストマスクパタン3とInGaP薄膜2を完全
に除去する(第4の工程)。更に、1500ÅのSiN
膜6を熱処理保護膜として堆積し、800℃で10分の
熱処理を行ってイオン注入層5中のSi元素4を活性化
してイオン注入能動層7を製作する(第5及び第6の工
)。
EXAMPLE A GaAs crystal was used as a substrate, and III containing In was used.
FIGS. 1 to 4 show an example of a manufacturing process of an ion implantation active layer according to the present invention when InGaP is used for a -V compound semiconductor crystal thin film and Si is used for an ion implantation element. That is, FIG. 1 shows that an InGaP thin film is formed on a GaAs substrate.
FIG. 4 shows a longer process diagram (first process). Figure 2 is a photo register
After forming a mask pattern, an Si element ion implanted layer is formed.
(Steps 2 and 3) are shown. Figure 3 shows a cash register
Process diagram for removing stomach pattern and InGaP thin film
(4th process) is shown. Fig. 4 shows the SiN film as a heat treatment protection film.
Forming an ion-implanted active layer by heat treatment
The process diagram (fifth and sixth steps) is shown. Each process is explained below.
I will tell. An InGaP thin film 2 is grown on a GaAs substrate 1 ( first step ). A photoresist mask pattern 3 is formed thereon, Si elements 4 are ion-implanted, and an ion-implanted layer 5 is formed in the substrate ( second and third steps ). Thereafter, the photoresist mask pattern 3 is ashed and removed by oxygen plasma treatment, and then immersed in hydrochloric acid for 1-2 minutes to completely remove the photoresist mask pattern 3 and the InGaP thin film 2 ( fourth step ). In addition , 1500 ° SiN
Depositing a film 6 as heat treatment protective film, by performing a heat treatment for 10 minutes at 800 ° C. to activate the Si element 4 of the ion implantation layer 5 to manufacture an ion-implanted active layer 7 (fifth and sixth Engineering of
About ).

【0007】図5は上記工程に従って形成したイオン注
入能動層と従来の方法で形成したイオン注入能動層のキ
ャリア濃度の基板面内分布を比較した図である。ただ
し、イオン注入は加速電圧30keVで面積密度1×1
13/cm2 の条件で行い、InGaP薄膜は有機金属
ガスを原料に用いる気相成長法(通常MOCVD法と呼
ばれる)により、50Åの膜厚に成長している。また、
イオン注入能動層は300μm角形状の領域を400
μm間隔でGaAs基板1の全面に形成している。図
はこれらのイオン注入能動層7の領域を基板直径方向に
5個ごと、即ち、2mm間隔で測定した場合の結果を示し
ている。
FIG. 5 is a diagram comparing the distribution of the carrier concentration in the substrate surface between the ion implantation active layer formed according to the above process and the ion implantation active layer formed by the conventional method. However, ion implantation was performed at an acceleration voltage of 30 keV and an area density of 1 × 1.
Under the condition of 0 13 / cm 2 , the InGaP thin film 2 is grown to a thickness of 50 ° by a vapor phase growth method (usually called MOCVD method) using an organic metal gas as a raw material. Also,
The ion implantation active layer 7 has a 300 μm square area of 400 μm.
It is formed on the entire surface of the GaAs substrate 1 at intervals of μm. Figure 5
Shows the results of measurement of these regions of the ion-implanted active layer 7 every five in the substrate diameter direction, that is , at intervals of 2 mm.

【0008】従来の工程で作製した場合、GaAs基板
外周部でキャリア濃度が減少しているのに対し、本発明
のGaAs基板中にイオン注入能動層を形成する方法で
形成した場合は、GaAs基板全面に渡ってキャリア濃
度が均一となっていることが分かる。これは、酸素プラ
ズマによるレジスト灰化はGaAs基板1の中央から始
まり、GaAs基板1の外周は灰化・除去されにくいこ
とを反映している。即ち、従来の工程を用いると、Ga
As基板1の外周部では熱処理保護膜とGaAs基板
表面の間にレジスト薄層が介在するため、熱処理工程
中に熱処理保護膜が剥離して、GaAs基板1の表面が
劣化しキャリア濃度が減少する。これに対し、本発明
GaAs基板中にイオン注入能動層を形成する方法を用
いるとGaAs基板1の外周部に残っていたレジスト薄
層はInGaP薄膜と一緒に完全に除去されるため、
GaAs基板1の表面の劣化は起こらず、キャリア濃度
GaAs基板1の面内で均一になる。
In the case of manufacturing by the conventional process, the carrier concentration is reduced at the outer peripheral portion of the GaAs substrate.
It can be seen that the carrier concentration is uniform over the entire surface of the GaAs substrate when the ion implantation active layer is formed in the GaAs substrate. This resist ashing with oxygen plasma starts from the center of the GaAs substrate 1, the outer circumference of the GaAs substrate 1 reflects the fact that hardly ashed and removed. That is , using the conventional process, Ga
In the outer peripheral portion of the As substrate 1 , the heat treatment protective film and the GaAs substrate 1
Since the resist thin layer is interposed between the surfaces of the GaAs substrate 1 , the heat treatment protective film is peeled off during the heat treatment step, so that the surface of the GaAs substrate 1 is deteriorated and the carrier concentration is reduced. On the other hand, of the present invention
When a method of forming an active layer for ion implantation in a GaAs substrate is used, the resist thin layer remaining on the outer peripheral portion of the GaAs substrate 1 is completely removed together with the InGaP thin film 2 .
No deterioration of the surface of the GaAs substrate 1 occurs, and the carrier concentration becomes uniform in the surface of the GaAs substrate 1 .

【0009】[0009]

【発明の効果】以上説明したように、本発明のGaAs
基板中にイオン注入能動層を形成する方法を用いれば熱
処理保護膜とGaAs基板は完全に密着するため、熱処
理工程中でのGaAs基板表面の劣化は起こらず、基板
面内あるいは基板間で特性の均一なイオン注入能動層を
実現できる。
As described above, the GaAs of the present invention can be used.
If a method of forming an ion-implanted active layer in a substrate is used, the heat treatment protective film and the GaAs substrate are completely adhered to each other, so that the surface of the GaAs substrate does not deteriorate during the heat treatment process, and the characteristics within the substrate surface or between the substrates are reduced. A uniform ion implantation active layer can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】GaAs基板上にInGaP薄膜を成長する工
程図(第1の工程)を示す。
FIG. 1 shows a process diagram ( first process ) for growing an InGaP thin film on a GaAs substrate.

【図2】フォトレジストマスクパタンを形成後Si元素
イオン注入層を形成する工程図(第2及び第3の工程
を示す。
FIG. 2 is a process chart of forming a Si element ion-implanted layer after forming a photoresist mask pattern ( second and third steps ).
Is shown.

【図3】レジストマスクパタンとInGaP薄膜を除去
する工程図(第4の工程)を示す。
FIG. 3 is a process diagram ( fourth process ) for removing the resist mask pattern and the InGaP thin film.

【図4】SiN膜を熱処理保護膜とする熱処理工程によ
りイオン注入能動層を形成する工程図(第5及び第6の
工程)を示す。
FIG. 4 is a process chart for forming an ion-implanted active layer by a heat treatment step using a SiN film as a heat treatment protection film ( fifth and sixth steps).
Step ).

【図5】本発明と従来例におけるイオン注入能動層のキ
ャリア濃度の基板面内分布の比較を示す。
FIG. 5 shows a comparison of the in-plane distribution of the carrier concentration of the ion implantation active layer between the present invention and the conventional example.

【符号の説明】[Explanation of symbols]

1 GaAs基板 2 InGaP薄膜 3 フォトレジストマスクパタン 4 Si元素 5 イオン注入層 6 SiN膜 7 イオン注入能動層 Reference Signs List 1 GaAs substrate 2 InGaP thin film 3 photoresist mask pattern 4 Si element 5 ion implantation layer 6 SiN film 7 ion implantation active layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 杉谷 末広 東京都千代田区内幸町一丁目1番6号 日本電信電話株式会社内 (56)参考文献 特開 昭57−21824(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 21/265──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Suehiro Sugita 1-6, Uchisaiwai-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (56) References JP-A-57-21824 (JP, A) (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/265

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 GaAs結晶を基板に用いて添加元素を
イオン注入し、前記GaAs基板を熱処理して前記Ga
As基板中にイオン注入能動層を形成する方法におい
て、 前記 GaAs基板表面にあらかじめInを構成元素に含
むIII −V族化合物半導体薄膜を堆積する第1の工程
と、 前記III −V族化合物半導体薄膜上にイオン注入マスク
を形成しパターニングする第2の工程と、 前記GaAs基板に前記添加元素をイオン注入する第3
の工程と、 前記III −V族化合物半導体薄膜及び前記イオン注入マ
スクを除去する第4の工程と、 前記GaAs基板上に熱処理保護膜を形成する第5の工
程と、 前記GaAs基板を熱処理する第6の工程とから構成さ
れる ことを特徴とするGaAs基板中にイオン注入能動
層を形成する方法。
An GaAs crystal is used as a substrate to implant ions of an additional element, and the GaAs substrate is heat-treated to form the Ga.
Method for forming ion implantation active layer in As substrate
Te first step of depositing a III -V compound semiconductor thin film including the advance In the configuration element to the GaAs substrate surface
And an ion implantation mask on the III-V compound semiconductor thin film
A second step of forming and patterning, and a third step of ion-implanting the additive element into the GaAs substrate.
And the step of III-V compound semiconductor thin film and the ion implantation mask.
A fourth step of removing a mask, and a fifth step of forming a heat treatment protective film on the GaAs substrate.
And a sixth step of heat-treating the GaAs substrate.
How to form an ion-implanted active layer in the GaAs substrate, characterized in that it is.
JP3061161A 1991-03-01 1991-03-01 Method for forming an ion implantation active layer in a GaAs substrate Expired - Lifetime JP2789262B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3061161A JP2789262B2 (en) 1991-03-01 1991-03-01 Method for forming an ion implantation active layer in a GaAs substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3061161A JP2789262B2 (en) 1991-03-01 1991-03-01 Method for forming an ion implantation active layer in a GaAs substrate

Publications (2)

Publication Number Publication Date
JPH04274320A JPH04274320A (en) 1992-09-30
JP2789262B2 true JP2789262B2 (en) 1998-08-20

Family

ID=13163141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3061161A Expired - Lifetime JP2789262B2 (en) 1991-03-01 1991-03-01 Method for forming an ion implantation active layer in a GaAs substrate

Country Status (1)

Country Link
JP (1) JP2789262B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5721824A (en) * 1980-07-14 1982-02-04 Fujitsu Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPH04274320A (en) 1992-09-30

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