JPS63115384A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To effectively improve characteristics of devices such as FET's or the like without deterioration of Schottky characteristics or deterioration of a steep hetero junction interface, by selectively irradiating an island-shaped active layer with laser light in gaseous atmosphere of impurity atoms, instead of implanting ions, for forming highly doped regions. CONSTITUTION:A GaAs substrate is exposed only at the surface of an island- shaped active layer 102 while the other surface is covered with a dielectric mask 104. The substrate is then irradiated with laser light in the gaseous atmosphere containing impurity atoms to form highly doped regions 106 and 107. The temperature in the highly doped regions 106 and 107 are increased in an instant by irradiation of excimer laser 105 and doped with impurities while the temperature at the Schottky junction of a gate is held at room temperature and the Schottky characteristics are not deteriorated. Further, since the temperature is not increased, the distribution of impurity concentrations in a FET active layer directly under the gate is not varied. Thereafter, a source electrode 108 is provided on the highly doped region 106 while a drain electrode 109 is provided on the highly doped region 107, so that GaAs FET is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a planar field effect transistor.

In conventional field effect transistors (hereinafter referred to as FETs), it is necessary to reduce the source resistance and drain resistance in order to improve the characteristics of the FET.
It is well known that it is desirable to be as low as possible in order to influence the transconductance (gm) of T. The source resistance is the contact resistance (Re) caused by the ohmic contact between the metal of the source electrode and the semiconductor, and the layer resistance 3 of the semiconductor active layer from the metal end of the source electrode to the metal end of the gate electrode.
It is expressed as a sum of pages (Rs). Therefore, in order to reduce the source resistance, a high impurity concentration region is formed in the source electrode portion by ion implantation or the like to lower the Re and at the same time the Rs.

The reason why Re is reduced by forming the high impurity concentration region is that the potential barrier formed at the semiconductor interface of the ohmic contact becomes thinner due to the high impurity concentration. For this purpose, it is desirable to have an impurity concentration distribution that has a sufficiently high impurity concentration even near the semiconductor surface. However, with ion implantation, the concentration distribution obtained is close to a Gaussian distribution, and although it cannot be said to be the optimal concentration distribution because the impurity concentration decreases near the semiconductor surface, it is often used because it can relatively easily obtain a shallow impurity concentration distribution. There is.

On the other hand, in order to reduce Rs, the high impurity concentration region is moved as close as possible to the gate electrode. One method is to form the gate electrode by ion implantation in a self-aligned manner using the gate electrode material as a mask.

In this method, the ion implantation layer must be heat-treated after the gate electrode metal is formed. For this reason, a so-called high melting point metal such as tungsten (W), which is expected to maintain good Schottky junction characteristics even at high temperatures, is used as the gate electrode metal. However, even if such a high-melting point metal is used as a gate material, there are many problems such as deterioration of Schottky characteristics, high resistivity of the material, and diffusion of impurities from the gate material during high-temperature heat treatment at about 800°C. This reduces FET yield and productivity.

Also, ultra-high speed transistors (high electron mobility transistors or HEMTs) that utilize extremely steep heterojunctions
In order to reduce the source resistance of the gate electrode, there is a method of self-aligning ion implantation into the gate electrode material as described above. In this case as well, in addition to the above-mentioned problem of heat resistance of the gate electrode material, the steep heterojunction interface deteriorates during high-temperature heat treatment and the steepness of the interface is lost. Therefore, the reduction in source resistance does not effectively contribute to improving the characteristics.

Page 5 Problems to be Solved by the Invention The problems to be solved by the present invention are that ion implantation is used when forming a highly doped region on the semiconductor surface in a self-aligned manner with the gate electrode material. The problem is that a heat treatment process of the ion-implanted layer at high temperature and over a long period of time is required. This causes deterioration of Schottky characteristics and deterioration of steep heterojunction interfaces, making it difficult to effectively improve the characteristics of devices such as FETs.

Means for Solving the Problems First, the means for solving the problems according to the present invention are as follows:
a step of selectively forming an island-like active layer on the main surface of a semiconductor substrate; a step of forming a Schottky gate electrode on the island-like active layer; and a step of forming an island-like active layer having the Schottky gate electrode. selectively irradiating the island-shaped active layer with a laser beam on the substrate on which the layer has been formed in a gas atmosphere containing predetermined impurity atoms to form a highly concentrated impurity-containing region; and A method of manufacturing a semiconductor six-page device is used, which includes at least a step of selectively forming an ohmic electrode thereon.

Second, a step of selectively separating and forming an active layer on the main surface of a semiconductor substrate having an epitaxially grown layer of different types of semiconductors or semiconductor layers having different impurity concentrations via a steep boundary layer of 10 nm or less; forming a Schottky gate electrode on a Schottky active layer; and forming a substrate on which an island-shaped active layer having a Schottky gate electrode is formed in a gas atmosphere containing predetermined impurity atoms. A method for manufacturing a semiconductor device, comprising at least the steps of selectively irradiating a laser beam onto an active layer to form a high concentration impurity mixed region, and selectively forming an ohmic electrode on the high concentration impurity mixed region. .

According to the present invention, instead of ion implantation, a method (hereinafter abbreviated as abbreviated as a method) in which the island-shaped active layer is selectively irradiated with laser light in a gas atmosphere containing impurity atoms to form a highly concentrated impurity-containing region. It is used with laser doping. For this reason, firstly, the impurity concentration distribution is shallow and yet steep;
Furthermore, a sufficiently high impurity concentration can be obtained near the semiconductor surface. Second, by selecting the laser wavelength, it is possible to dope the semiconductor surface without heating the interface between the gate electrode metal and the semiconductor. A highly doped region can be formed on the surface. Furthermore, in the active region of an FET that uses a steep heterojunction, the temperature does not rise because the area directly under the gate electrode is shaded by the laser beam, and the steepness of the interface is not deteriorated by laser doping.

Example The present invention will be explained in more detail by way of examples.

FIG. 1 shows a first embodiment of the present invention in which G a A 5
As shown in Figure (a), the FET manufacturing method is as follows:
n on the main surface of the semi-insulating GaAs semiconductor substrate 101
An active layer 102 of a type conductive layer was formed. This active layer is S
3 x 10 l ions with an acceleration energy of 5QkeV
It was formed using ion implantation with an implantation dose of 12 cm-2. Next, as shown in FIG. 5B, a gate electrode 108 having a T-shaped cross section was formed on the active layer. This gate electrode metal is made of AI/Ti (3000A/100OA)
A two-layer metal film deposited by electron beam evaporation was used. This Schottky junction of the gate electrode is obtained by AI, and as is well known, AI is G a A
This is a gate material that is very commonly used as a gate metal for s-semiconductor FEETs. The T-shaped cross section of the gate electrode prevents the high impurity concentration layer that will be formed later from coming into direct contact with the gate electrode. It was done.

As shown in the same figure (c), the GaAs substrate is exposed only on the surface of the island-shaped active layer 102, the other surfaces are covered with a dielectric mask material 104, and then a gas containing impurity atoms is exposed. High concentration impurity mixed regions 106 and 107 are formed by irradiating laser light in an atmosphere.

The gas containing impurity atoms is a mixed gas of hydrogen gas, arsine gas, and disilane gas, and the laser beam (page 9) is an excimer laser using xenon chloride (
308 nm) was used. At this time, the temperature of the GaAs substrate was kept at room temperature. Although the temperature of the heavily doped regions 106 and 107 instantaneously rises to a high temperature due to excimer laser irradiation and impurities are mixed therein, the Schottky characteristics of the gate do not deteriorate because the temperature of the Schottky junction of the gate is maintained at room temperature. Furthermore, the impurity concentration distribution in the FET active layer directly under the gate does not change because the temperature does not rise.

After that, as shown in the same figure (d), the high concentration impurity mixed region 1
06, a source electrode 108 and a heavily doped region 10
A drain electrode 109 is formed on G a A s
FET was manufactured.

FIG. 2 shows a second embodiment of the present invention, which is a method for manufacturing a high electron mobility transistor (HEMT).
is a GaAs shrimp substrate for HEMT.

201 is a semi-insulating GaAs substrate, 202 is a non-doped GaAs buffer layer, the thickness is 1 μm, and the carrier concentration is I x 1015 cm-3. 203 is an A I 0.3G a O,7A s layer epitaxially grown for 10 pages to have a steep interface on a non-doped Ga As layer, and the carrier concentration is 1 x 10 18 cm -3 .
The thickness is 20OA, but there is about 2
It includes a spacer layer of 0A non-doped AI 0.3G ao and 7A s layer. 204 is a highly impurity-concentrated GaAs layer with a thickness of about 5OA and an A I 0.
It is used to prevent oxidation of the 3G a 0.7A s layer and to improve the contact resistance of ohmic electrodes.

As shown in Figure (b), the active layer 202 of the shrimp substrate.
203 and 204 are selectively separated into islands as shown at 205. Next, regarding the formation of the gate electrode 206, the formation of the high impurity concentration layers 209 and 210 by the laser doping method, and the formation of the source electrode 211 and the drain electrode 212, as shown in FIGS. This is exactly the same as in the first embodiment according to the invention.

As a result, the temperature of the active layer 205 directly under the gate electrode 206 does not rise because the excimer laser light is in the shadow of the gate electrode, and the steep hetero-interface as shown in FIG. It is possible to reduce the source resistance without deteriorating the characteristics of the two-dimensional electron gas generated.

In this example, Ga As F ET and Ga
Although we have shown an example of manufacturing AsHEMT, other methods such as Sl and In
The effects of the present invention are exactly the same in the manufacture of FETs and HEMTs using P semiconductors.

Further, although a xenon chloride excimer laser was used as the laser beam, it is clear that the present invention is not limited to this. Further, although a mixed gas of hydrogen gas, arsine gas, and disilane gas was used as a mixed gas for laser doping, the present invention is not limited to this. For example, in the case of a Sl semiconductor, a mixed gas containing arsine or phosphine gas can be used for N-type, and a mixed gas containing diborane gas can be used for P-type.

During laser doping, the temperature of the GaAs substrate was kept at room temperature;
The substrate temperature can be set arbitrarily as long as the temperature is below the thermal decomposition of the a As substrate.

Effects of the Invention As an effect of the present invention, firstly, although it includes a step of forming a highly doped region on the semiconductor surface in a self-aligned manner with respect to the gate electrode metal, it is possible to use a high melting point material as the gate electrode material. A commonly used metal such as A1 can be used. Therefore, since no special manufacturing process is required, the characteristics of the FET can be improved without impairing productivity or reliability. Second, when forming a highly doped region on the semiconductor surface in a self-aligned manner with respect to the gate electrode metal on a semiconductor substrate with a steep hetero-interface or a superlattice structure, it will also be in the shadow of the gate electrode. There is no deterioration of steep heterostructures or superlattice structures in the region. This has made it possible to form good electrodes in a self-aligned manner on the substrates of high electron mobility transistors (HEMTs), hot electron transistors (HETs), resonant tunneling elements, quantum well devices, etc. without impairing their properties. .

[Brief explanation of the drawing]

FIG. 1 on page 13 is a cross-sectional view of the manufacturing process of a GaAsFET according to the first embodiment of the present invention, and FIG. 2 is a cross-sectional view of the manufacturing process of a GaAs HEMT according to the second example of the present invention. 101...GaAs substrate, 102...Island-shaped active layer, 108...Gate electrode, 105...Excimer laser light, 106.107...High concentration impurity mixed region, 108.109 ...source, drain electrode, 20
1゜202.203,204---Ga for HEMT
A s substrate, 205... active layer separated into islands, 2
06...Gate electrode, 208...Excimer laser light, 209.210...High concentration impurity mixed region, 211
゜212...Source, drain electrode.

Claims (2)

[Claims] (1) A step of selectively forming an island-like active layer on the main surface of a semiconductor substrate, a step of forming a Schottky gate electrode on the island-like active layer, and an island having the Schottky gate electrode. selectively irradiating the island-shaped active layer with a laser beam in a gas atmosphere containing predetermined impurity atoms to form a highly-concentrated impurity-containing region; A method of manufacturing a semiconductor device including at least a step of selectively forming an ohmic electrode on an impurity-doped region. (2) selectively separating and forming an active layer on the main surface of a semiconductor substrate having an epitaxial growth layer of different types of semiconductors or semiconductor layers with different impurity concentrations via a steep boundary layer of 10 nm or less; a step of forming a Schottky gate electrode on the active layer; and a step of forming the island-shaped active layer on the substrate in which the island-shaped active layer having the Schottky gate electrode is formed in a gas atmosphere containing predetermined impurity atoms. A method for manufacturing a semiconductor device including at least the steps of selectively irradiating a laser beam onto the region to form a highly doped region, and selectively forming an ohmic electrode on the highly doped region.