JPS63115372A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the breakdown of an interlayer insulation film due to hillocks and to improve reliability by a method wherein at least the part serving as the Schottky barrier electrode is constructed in two layers - the first layer made of viewer Al and the second layer made of Si-doped Al. CONSTITUTION:A lightly-doped N type Si substrate 1 is prepared. First, a ther mal oxide film (SiO2)2 generated over the surface is partly windowed by photoresist technique, and a viewer Al film 3 is formed thereon by evaporation (or sputtering). Next, a 2-3% Si-doped Al film 4 is formed over the whole surface and then etched in succession to produce wiring patterns. A plasma SiN film 6 is deposited as the underlayer film of an interlayer insulation film. Thereafter, the work undergoes contact alloying in dry O2 to form a Schottky barrier 7 between the viewer Al and the Si substrate. This process prevents the generation of voids of Al wirings and of hillocks and ensures the improve ment of the initial yield and the reliability. Since the underlayer Al is viewer Al, Schottky characteristics can be secured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor device having a multilayer N1 wiring structure having a Schottky barrier diode.

[Prior art]

Regarding fine multilayer interconnection technology in semiconductor devices, please refer to Electronic Materials, March 1982 issue, published by Industrial Research Association Co., Ltd., p. 38.
-44.

As part of the content, there are methods to use resin insulation and inorganic insulation such as CVD-PSG films as flattening techniques for interlayer insulation films in multilayer interconnections, and that silicon is added to A2 as a measure to suppress hillocks in A4 vapor-deposited films. Techniques for adding copper and copper have been described.

By the way, the present inventor is considering a multilayer wiring IC having a Schottky barrier diode as shown in FIGS. 8 to 10. The shield barrier electrode is formed by depositing AA3 on the surface of the n-type Si substrate U (Fig. 8) and alloying it with alloy 7, but in order to obtain a shield barrier diode with a large work function, K is Pure A! It is a condition to use .

The interlayer insulating film of the multilayer interconnection being considered by the present inventor is made by depositing 5 layers of plasma SiN film on pure AA electrodes as shown in FIG. 5OG (spin-on-glass) film 8 and CVD-PSG film 9 for planarization are
It is laminated in layers. Note that this technique is not necessarily known.

[Problem that the invention seeks to solve]

As mentioned above, in order to improve the characteristics of the Schottky barrier diode, contact alloying is performed at 490°C after forming Pure A7, but the first layer A2 wiring is Pure A!
Because of this, when heat treated at 490° C., irregularities called hillocks are formed on the surface. The plasma SiN film is used to suppress the i from above and prevent the occurrence of unevenness, but the contact alloy (490°C) is made of this plasma SiN film.
This is done after film formation. However, since i is completely suppressed from above, when contact alloying is performed at 490°C, abnormal stress is applied to A4 as it tries to move, and as shown in Figure 9, part of A4 becomes void (bubble). ) and hole 10a
As it heats up, the extreme KA1 leech white 10b grows,
Accidents such as breaking through the thin (0.15 μm) plasma SiN film occur, resulting in problems such as disconnection of the A wiring, poor characteristics due to "openings" on the St contact, and short-circuiting of the 9-layer wiring.

[Purpose of the invention]

The present invention has been made to overcome the above-mentioned problems, and its purpose is to prevent destruction of interlayer films due to hillocks in multilayer wiring structures having Schottky diodes, and to provide highly reliable semiconductor devices. Our goal is to provide the following.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, at least the portion that will become the Schottky barrier electrode has a two-layer structure, and the first layer is pure! , the second layer is Si
It uses A stone.

[Effect]

According to the above means, Si of the Schottky barrier electrode
Since the lower part in contact with is pure A, 6,
Schottky characteristics are ensured, and the upper layer is A, g-8
By being i, the occurrence of hillocks can be prevented and the object of the invention described above can be achieved.

[Example 1] FIGS. 1 to 6 show an example of the present invention, in which a sealed barrier film having a two-layer structure of pure Ak and Si-containing AA on a Si semiconductor substrate is shown. FIG. 3 is a process cross-sectional view showing a process of forming a diode. The steps will be explained below in order.

fil! A Si substrate 1 with a low concentration n-type conductivity is prepared, and a thermal oxide film (Sin) or CVD film is formed on the surface.
- The PSG film 2 is opened in - part by photoresist technology,
On top of this, a peer AA film 3 is formed by vapor deposition or sputtering to a thickness of about 1.0 μm (FIG. 1).

(21) Next, A! film 4 containing 2-3% Si is applied to the entire surface.
Formed by vapor deposition (sputtering) to a thickness of approximately 0 μm (
Figure 2). In addition, the above-mentioned Si-containing l? Instead, use a material that does not easily produce hillock, such as Wo, 2-3% A2
Alternatively, Cu-containing A2 may be formed.

(3; A/1(-8
I and pure Al are sequentially etched to form a required wiring pattern (FIG. 3).

(A plasma SiN film 6 is deposited as a lower layer film of the interlayer insulating film 41. The film thickness is about 0.15 μm.
Ru. Thereafter, a contact door was heated for 20 minutes at a dry temperature of 490 tl:' to form a Schottky barrier 7 between the pure Ak and the Si substrate (FIG. 4).

(5) Interlayer 5OG (spin-on-
Glass) membrane 8'! 1” to a thickness of approximately 0.1 μm (Figure 5).

(6) PSG as the upper interlayer film by CVD method
A (IJn silicate glass) film 9 is deposited to a thickness of 0.6 μm. In this case, the P (phosphorus) concentration is 6
It should be about m01%.

After this, through holes (not shown) are made in the interlayer insulating film using a photoresist mask, AJllt for the second layer of AA wiring is evaporated (splattered), and patterned with photoresist. multilayer A2
Obtain the wiring structure.

According to the above embodiment, in the wiring structure having a Schottky diode, step fl)(2) of the manufacturing process thereof.
The following effects can be obtained by forming a two-layer structure of pure A2 and Si-containing A2 with +.

That is, after the process (depositing interlayer plasma SiN in step 41) and contact alloying in step 490C, it is possible to prevent the occurrence of voids and hillocks in the A2 wiring that occur in the conventional case, and as a result, the initial yield and An improvement in reliability can be expected. Also, the lower layer A2 is pure A
By being A, Schottky characteristics can be ensured.

[Embodiment 2] FIG. 7 shows another embodiment of the present invention, in which a Schottky barrier diode and an NPN transistor are formed in one semiconductor island region, and multilayer wiring is provided thereon. FIG.

11 is a p-type Si substrate serving as a substrate, 12 is an n
The +buried layer 13 is an epitaxial/L/n type Si layer and forms one island region separated by an isolation p+ layer 14.

Reference numeral 15 denotes a p-type diffusion layer which serves as the base of the npn) run lister, and a portion of the p-type diffusion layer is vertically removed, so that a portion 16 of the n''''-type layer is exposed on the surface. Pure A on this exposed part! A film 3 is formed to create a Schottky barrier between it and the Si. 2
is the surface SiOt film.

17&! The n+ diffusion layer 18 is the collector of the npn transistor, and the n 2 diffusion layer 18 is the emitter.

4 is an A1 film containing Si, and a portion of it is made of Pier A! to prevent hillocks. It is superimposed on the membrane 3, and the other part is n
pn) Provided on each region of the run lister to create ohmic electrodes.

6 is a plasma SiN film, 8 is an SOG film, and 9 is a PSG film, and an interlayer insulating film is formed by these.

19 is a second layer AJ3 (Si-containing AA) wiring.

In the semiconductor device described in the embodiments above, pure AJ
By using I, Schottky characteristics can be obtained, and pure A! Furthermore, hillocks are prevented by stacking Si-containing AA, eliminating short-circuit defects with the second-layer AA wiring.In addition, in npn) run listers, by providing Si-containing AAt poles, AAs can be prevented even on shallow junctions. A chisel pole can be formed.

Although the invention made by the present inventor has been specifically explained above based on examples, the present invention is not limited to the above-mentioned examples (although it is possible to make various changes without departing from the gist of the invention). Not even.

For example, as the interlayer film, the plasma 5iN-8OG
- It is possible to use combinations of insulators other than PSG.

The present invention has a Schottky barrier and a diode, and S
The present invention can be applied to all ICs and LSIs having an AA multilayer wiring structure using an insulating material as an interlayer film.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

In other words, in a multilayer wiring structure having Schottky diodes, the Schottky characteristics can be maintained, and hilllocks in the KA wiring can be prevented, and reliability can be improved.

[Brief explanation of the drawing]

1 to 6 are process cross-sectional views showing one embodiment of the present invention. FIG. 7 is a sectional view showing another embodiment of the present invention. FIGS. 8 to 10 are partial process cross-sectional views showing examples of conventional Schottky diodes. 1...Si substrate, 2...Sin, film, 3...Pure AA film, 4...Si-containing A! Film, 5... Photoresist mask, 6... Plasma SiN film, 7... Schottky barrier, 8... SOG film, 9... PSG
film. Figure 3/S 4th Ff! J Evening Bottle Resist

Claims (1)

[Scope of Claims] 1. In a semiconductor device having a multilayer aluminum wiring including a Schottky barrier diode electrode on a part of one main surface of a semiconductor substrate, at least the portion that becomes the Schottky barrier diode electrode has a two-layer structure, and the lower layer A semiconductor device characterized in that the layer is made of pure aluminum and the upper layer thereof is made of an aluminum alloy. 2. The semiconductor device according to claim 1, wherein the upper layer is made of silicon-containing aluminum.