JPS621246A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent disconnections at a stepped section, and to increase the withstanding voltage of insulating films on a semiconductor substrate by laminating an silicon oxide film formed through a vapor phase growth method or a first insulating film consisting of silica glass containing phosphorus and a second insulating film composed of mixed silica glass containing phosphorus and boron. CONSTITUTION:A thermal oxide film 12, a polysilicon layer 13 and a polysilicon layer 14 are formed onto an silicon substrate 11, a PSG film 15 having phosphorus of 6mol% wt.mol. concn. is grown by a mixed gas of PH3, etc. PSG is melted through heat treatment to make a stepped section easy, a mixed silica glass film 17 of PSG and BSG severally having phosphorus and boron of 5mol% wt.mol concn. is grown by the same mixed gas, and thermally treated and melted and fluidized to make the stepped section gentle, a photo-resist 18 is applied onto the whole surface, the mixed silica glass film 17 and one part of the upper side of the PSG film 15 are etched, and a contact hole 20 is bored. The photo-resist 18 is removed, a polysilicon film 19 is grown, and an N-type layer 110 in high concentration is shaped to improve connections with an element region 111.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which the withstand voltage of an interlayer insulating film is improved and disconnection of an upper wiring layer is prevented, and a method for manufacturing the same.

[Conventional technology]

As semiconductor devices become more highly integrated, there is a tendency for conductive films and wiring films formed on semiconductor substrates to become multi-layered, resulting in steeper steps in the upper layer, which is thought to cause step breaks, especially in the upper wiring layer. There is a risk of wire breakage. For example, the second
Figure (a) shows a conventional semiconductor device having multilayer wiring, in which a thermal oxide film 22, a first polysilicon layer 23, and a second polysilicon layer 24 are formed on a silicon substrate 21. Then, a mixed silicate glass (BPSG) film 25 having a superimposed molar concentration of phosphorus and boron of 8 mol percent each is coated with about 1
It is formed to a thickness of mm. If the aluminum (/l) wiring 26 is directly deposited on top of this, a break will occur in the A1 wiring 26 at the stepped portion of the silicate glass film 25 as shown by the chain line in the figure, resulting in disconnection.

Therefore, as shown in FIG. 2(b), the silicate glass film 25
After forming the silicate glass film 25, a heat treatment is performed for 30 minutes in a steam atmosphere at 850° C. to slightly melt the silicate glass film 25, softening the steep step portion, and forming the AJ wiring 28. . At this time, a polysilicon film 27 of approximately 2000 layers is formed as a base for the AIl wiring 28.

[Problem that the invention seeks to solve]

In the conventional structure described above, the silicate glass film 25 is heat-treated and melted to make the stepped portion gentle. Due to the high temperature, the flow is significant, and the thickness of the silicate glass film 25 in this area is reduced, and the dielectric strength between the lower wiring 23.24 and the upper wiring 27.28 is likely to be lowered. The problem has arisen that it leads to a decline in trust and relationships.

[Means for solving problems]

In the semiconductor device of the present invention, a silicon oxide film or a silicate glass containing phosphorus is formed by a vapor phase growth method as an insulating film on a semiconductor substrate in order to prevent disconnection at step portions and to improve the withstand voltage of the insulating film. The first insulating film is made of a first insulating film, and the second insulating film made of a mixed silicate glass containing phosphorus and boron is laminated thereon.

Further, the manufacturing method of the present invention includes a step of forming a first insulating film and heat-treating it to alleviate the step difference, and then forming a second insulating film and heat-treating it to reduce the step difference. The method also includes a step for alleviation.

[Implementation box]

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) show an embodiment of the present invention in the order of its manufacturing steps.

First, as shown in FIG. 2A, a thermal oxide film 12 is formed on the surface of a silicon substrate 11, and a first polysilicon layer 13 and a second polysilicon layer 14 are formed thereon.

Moreover, on top of this, PH3()t Suff, r7), SiH,
(Silla 7), using a mixed gas of ox (oxygen),
A PSG (phosphorus glass) film 15 having a phosphorus molar concentration of 6 mol percent is grown to a thickness of 0.3 μm. Then, this PSGI 115 is heat-treated at a temperature of 800 to 1100° C. to melt the PSG and cause some flow, thereby softening the steep step portion and forming the first layer of the insulating film.

Next, as shown in the same figure (b), P H2, Bi Hh (
diborane) and SiH4,0□ to produce PSG with a molar concentration of phosphorus and boron of 5 mol percent each.
A mixed silicate glass film 17 of and BSG (boron glass) was grown to a thickness of 0.5 μm.
By heat-treating at 0 to 1000° C. to melt and flow, the stepped portion is made gentle, and a second layer of insulating film is formed.

Thereafter, in order to form a contact hole as shown in FIG. 2C, a photoresist 18 is applied to the entire surface and patterned. Using this as a mask, the above-mentioned photoresist 18 is etched using a hydrofluoric acid-based etching solution. The mixed silicate glass film 17, which is the second insulating film, and the upper part of the PSG film 15, which is the first insulating film, are etched. Next, the rest of the PSG film 15 and the thermal oxide film 12 are etched again using the active ion etching (RIE) method.
Contact hole 20 will be opened.

After that, as shown in the same figure (d), the photoresist 1
8 is removed, a polysilicon film 19 with a thickness of 2000 nm is grown, and phosphorus diffusion is performed at 920° C. for 30 minutes to dope the polysilicon film 19 to N-type.

At the same time, phosphorus is diffused into a part of the main surface of the silicon substrate 11 through this polysilicon film 19 to form a high concentration of N.
A mold layer 110 is formed to improve connection with the element region 111. Then, an Al film 21 is formed on the polysilicon film 19, and the Aβ film 21 and the polysilicon film 19 are simultaneously patterned to complete a two-layered wiring electrode.

Therefore, in such a structure, the first insulating film is made of PSGIII! containing a low concentration of phosphorus. 15, it can be melted and fluidized by heat treatment, making the level difference at the shoulder of the underlying wiring gentle,
Moreover, the decrease in the thickness can be suppressed. Furthermore, a mixed silicate glass film 17 containing low concentrations of phosphorus and boron is formed as a second insulating film on this first insulating film,
Since it is melted and made to flow through low-temperature heat treatment, it is possible to reduce the level difference and flatten the entire surface. The thickness can be covered by covering the portion corresponding to the wiring shoulder. As a result, a polysilicon film 19 and an Al film 21 are formed as upper wirings on these insulating films.
It is possible to prevent step breakage due to step differences, and improve the reliability of the wiring by improving the dielectric strength between the wiring and the underlying wiring.

Here, the first layer insulating film may be silicon oxide formed by a vapor phase growth method, and in the case of a PSG film, the molar concentration of phosphorus can be arbitrarily set in the range of 2 to 6. Further, the molar concentration of phosphorus in the second layer insulating film can be set arbitrarily within the range of 4 to 8 mol percent, and the molar concentration of boron can be set within the range of 2 to 12 mol percent.

〔Effect of the invention〕

As explained above, the present invention provides, as an insulating film on a semiconductor substrate, a first layer insulating film made of a silicon oxide film formed by a vapor phase growth method or a silicate glass containing a low concentration of phosphorus;
The structure is such that a second layer of insulating film made of mixed silicate glass containing low concentrations of phosphorus and boron is laminated on top of this, so each of these insulating films is melted by heat treatment to reduce the level difference and It is possible to suppress the reduction in the thickness of the insulating film in some parts, thereby having the effect of preventing disconnection of the upper layer wiring and improving the dielectric strength voltage.

[Brief explanation of drawings]

FIGS. 1(a) to 1(d) are sectional views showing the semiconductor device of the present invention in the order of its manufacturing steps, and FIGS. 2(a) and 2(b) are sectional views illustrating the conventional manufacturing steps. 11.21...Silicon substrate, 12.22...Thermal oxide film, 13.23...First layer polysilicon film, 1
4.24...Second layer polysilicon film, 15...
1st layer insulation film (PSG film), 17... 2nd layer insulation III (mixed silicate glass), 18... photoresist, 19... polysilicon film, 2o... contact hole , 21..., l wiring layer, 25...BPSG
Film, 110...N type layer, 111... Element region.

Claims (1)

[Claims] 1. The interlayer insulating film formed between the base wiring and the upper wiring of the semiconductor substrate is a silicon oxide film formed by a vapor phase growth method or a silicate glass containing 2 to 6 percent by weight molar concentration of phosphorus. A first layer insulating film made of phosphorus and a second layer insulating film made of mixed silicate glass containing 4 to 8 percent by weight molar concentration of phosphorus and 2 to 12 percent by weight molar concentration of boron are stacked one above the other. A semiconductor device characterized by: 2. On the underlying wiring formed on the semiconductor substrate, form a first layer insulating film made of silicon oxide film or silicate glass containing 2 to 6 wt molar concentration of phosphorus by vapor phase epitaxy, and a step of heat treatment at 800 to 1000° C., and forming thereon a second layer of insulating film made of mixed silicate glass containing 4 to 8 percent by weight molar concentration of phosphorus and 2 to 12 percent by weight molar concentration of boron, This is 70
A method for manufacturing a semiconductor device, comprising the steps of heat treatment at 0 to 1000° C. and forming an upper wiring thereon.