JPH0258873A - Lamination structure semiconductor substrate - Google Patents

Abstract

PURPOSE:To restrain contamination to a minimum in the manufacturing process of a semiconductor device by arranging a polycrystalline layer so as to be adjacent to dialectic. CONSTITUTION:A high concentration N<+> type diffusion layer 3 is formed by implanting ion, e.g., As, in a mirror-polished surface of a first silicon semiconductor substrate, and thermally diffusing it to a specified depth. A polysilicon layer 3 is grown thereon by low pressure CVD method. A thermal oxidation film 4 is grown on the mirror-polished surface of a second silicon semiconductor substrate 5. The thermal oxidation film 4 is dielectric interposed between a first and a second different silicon semiconductor substrates 1 and 5. The polysilicon layer 3 adjacent to the thermal oxidation film 4 becomes gettering nucleus of contamination atoms at the time of forming a semiconductor device. Since the contamination atom is trapped by the crystal defect of the polysilicon layer 3, the number of contamination atoms in the first and the second silicon semiconductor substrates 1, 5 remarkably decreases.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) This invention relates to a semiconductor substrate, and particularly to a laminated structure semiconductor substrate in which two or more semiconductor substrates are bonded with a dielectric interposed therebetween. .

(Prior Art) In recent years, adhesive technology for directly bonding two or more different semiconductor substrates, especially silicon semiconductor substrates, has been developed. As a technique for directly bonding two or more different semiconductor substrates, the bonding surface of the semiconductor substrates to be bonded is mirror-polished,
There is a method of bonding these adhesive surfaces together without using an adhesive and heat-treating them to bond them.

FIG. 8 shows a first conventional example of an IPD (Integrated PD), which is formed using a laminated structure semiconductor substrate (adhesive wafer) in which two different semiconductor substrates are bonded with a dielectric interposed between them.
1Iiligent Power Device)

In FIG. 8, a first silicon semiconductor substrate 1, a second
A silicon semiconductor substrate 5' is prepared. First, ions of, for example, As (arsenic) are implanted into the mirror-polished surface of the first silicon semiconductor substrate 1, and then thermally oxidized slO is formed by thermal oxidation. Due to the heat at this time, the implanted ions are thermally diffused to a predetermined depth to form an N0 type diffusion layer 2.

Next, a thermal oxide film 4 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5'. Then, on this second silicon semiconductor substrate 5', the first silicon semiconductor substrate 1 is inverted so that the mirror-polished surfaces of the first and second silicon semiconductor substrates 1.5- face each other. The first and second silicon semiconductor substrates 1.5' are bonded together by heat treatment at a temperature of 1100° C. in an atmosphere of 0□, and the semiconductor substrate 1 is polished to a predetermined thickness.

Next, in the bonded first and second silicon semiconductor substrates, a photoresist is deposited on the first silicon semiconductor substrate 1 disposed in the upper layer to form a power transistor region pattern. This power transistor is removed by etching so as to reach the underlying second silicon semiconductor substrate 5', and a new N-type silicon layer 16 is grown in a vapor phase, followed by polishing again to a predetermined thickness.

Next, photoresist is deposited again to form an element insulation isolation region pattern, and the lower second silicon semiconductor substrate 5-
A hole for the element isolation insulating region is opened so as to reach the hole, the side surface of the hole is oxidized to form an oxide film 6'', and then a polysilicon layer 3' is deposited in the hole.

The photoresist is removed and photoresist is deposited again to form a P-type head pattern. Then, ions of, for example, B (boron) are implanted into the P-type formation region. Next, the photoresist is removed, an N-type region pattern is formed, and, for example, As (arsenic) is ion-implanted at a high concentration into this N-type formation region and thermally diffused. ′ and N
A medium-sized region 9.13.13' is formed. Next, a P0 type region pattern is formed again using photoresist, and ions of, for example, B (boron) are implanted at a high concentration into this P0 type region and thermally diffused to form a P00 type high concentration diffusion layer 15. Form.

Next, a gate oxide film is formed on the entire surface, and polysilicon is deposited on the entire surface and patterned into a predetermined electrode pattern to form a gate electrode. Next, an interlayer insulating film is deposited over the entire surface, contact holes are opened, and predetermined wiring is provided, thereby creating an IPD (Intelligent
P over D evfce) is produced.

Next, FIG. 9 shows a cross-sectional view of a diode, as a second conventional example, formed using a laminated structure semiconductor substrate (bonded wafer) in which two different semiconductor substrates are bonded with a dielectric interposed therebetween.

In FIG. 9, a first silicon semiconductor substrate 1 and a second
A silicon semiconductor substrate 5 is prepared, and first, a mirror-polished surface of the first silicon semiconductor substrate 1 is coated with, for example, As (arsenic).
is ion-implanted and diffused to a predetermined depth to form a high-concentration N medium-sized diffusion layer 2.

Next, a thermal oxide film 4 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5. Then, the first silicon semiconductor substrate 1 is inverted onto the second silicon semiconductor substrate 5 so that the mirror-polished surfaces of the first and second silicon semiconductor substrates 1.5 face each other. The first and second silicon semiconductor substrates 1.5 are bonded together by heat treatment at a temperature of 1100° C. in an 02 atmosphere, and then the silicon semiconductor substrate 1 side is polished to a predetermined thickness.

Next, in the bonded first and second semiconductor substrates, a thermal oxide film 6 is formed by thermal oxidation on the first silicon semiconductor substrate 1 disposed in the upper layer, and a cathode electrode is taken out using photoresist. The oxide film in the region is removed, and ions of, for example, As (arsenic) are implanted and thermally diffused to form a high concentration N medium diffusion layer 9 for taking out the cathode electrode so as to be in contact with the high concentration N medium diffusion layer 2. Next, the photoresist is removed, and a new photoresist is used to remove the oxide film in the anode electrode extraction area. For example, B (boron) is ion-implanted and thermally diffused to form a high-concentration P layer for the anode electrode extraction area. A mold diffusion layer 8 is formed. Next, after removing the photoresist, polysilicon containing P (phosphorus) is deposited on the entire surface and patterned to form anode and cathode electrodes 7, and a diode is manufactured.

Conventionally, such a laminated structure semiconductor substrate (adhesive process-c)
Although adhesion technology between semiconductor substrates has been developed for semiconductor devices formed using semiconductor devices, since this adhesion technology has only recently been put into practical use, no consideration has been given to contamination during the manufacturing process of semiconductor devices. However, due to contamination during this manufacturing process, that is, contamination atoms enter the semiconductor substrate, the leakage current of the PN junction of the semiconductor device formed on this semiconductor substrate is large, or the life of minority carriers is high. There were drawbacks such as short time.

(Problem to be solved by the invention) This invention has been made in view of the above points.
An object of the present invention is to provide a stacked structure semiconductor substrate that has the effect of minimizing contamination during the manufacturing process of a semiconductor device.

[Structure of the Invention (Means for Solving the Problem) The laminated structure semiconductor substrate according to the present invention has a laminated structure formed by bonding two or more different semiconductor substrates with at least one dielectric interposed therebetween. A structural semiconductor substrate (adhesive/') is characterized in that a polycrystalline layer is provided adjacent to this dielectric.

(Function) In the laminated structure semiconductor substrate as described above, the polycrystalline layer provided adjacent to the dielectric material becomes a nucleus for gettering of contaminant atoms in the manufacturing process of semiconductor devices. By trapping contaminant atoms in crystal defects, etc., the number of contaminant atoms in the semiconductor substrate is significantly reduced, making it possible to form highly reliable and high-performance semiconductor devices on the semiconductor substrate. It becomes possible.

(Example) Hereinafter, with reference to FIGS. 1 to 5, a diode formed using a laminated structure semiconductor substrate according to the present invention, a method for manufacturing the same, an isolation type bipolar integrated circuit, and a method for manufacturing the same will be described. .

(1) A diode according to the first embodiment formed using the laminated structure semiconductor substrate of the present invention will be explained using the cross-sectional view of FIG.

In FIG. 1, a first silicon semiconductor substrate 1, a second
A silicon semiconductor substrate 5 is prepared, and first, a mirror-polished surface of the first silicon semiconductor substrate 1 is coated with, for example, As (arsenic).
is ion-implanted and thermally diffused to a predetermined depth to form a high-concentration N medium-sized diffusion layer 2.

Next, a polysilicon layer 3 is formed on top of the polysilicon layer 3 by low pressure CVD (Che
Mical V apor D eposition
) method at a growth temperature of 650°C, for example, 2000 people.

Next, a thermal oxide film 4 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5. Then, the first silicon semiconductor substrate 1 is inverted onto the second silicon semiconductor substrate 5, and the first and second silicon semiconductor substrates 1 are placed on top of the second silicon semiconductor substrate 5.
．． The first and second
The silicon semiconductor substrates 1.5 are bonded together, and then the silicon semiconductor substrate 1 side is polished to a predetermined thickness.

Next, in the bonded first and second semiconductor substrates, a thermal oxide film 6 is formed by thermal oxidation on the first silicon semiconductor substrate 1 disposed in the upper layer, and a cathode electrode is taken out using photoresist. The oxide film in the region is removed, and ions of, for example, As (arsenic) are implanted and thermally diffused to form a high concentration N medium diffusion layer 9 for taking out the cathode electrode so as to be in contact with the high concentration N medium diffusion layer 2. Next, the photoresist is removed, and a new photoresist is used to remove the oxide film in the anode electrode extraction area. For example, B (boron) is ion-implanted and thermally diffused to produce a high concentration of P for the anode electrode extraction. A mold diffusion layer 8 is formed. Next, after removing the photoresist, polysilicon containing P (phosphorus) is deposited on the entire surface and buttered to form anode and cathode electrodes. A diode according to the first embodiment is manufactured.

According to the diode having such a configuration, the polysilicon layer 3 adjacent to the thermal oxide film 4 which is a dielectric interposed between two different first and second silicon semiconductor substrates 1.5 is a semiconductor layer. Contamination in the first and second silicon semiconductor substrates 1.5 becomes a nucleus for gettering of contaminant atoms when forming a device, and the contamination atoms are trapped in crystal defects of this polysilicon layer 3. The number of atoms is significantly reduced and a high performance, highly reliable diode can be provided.

(2) A diode according to a second embodiment formed using the laminated structure semiconductor substrate of the present invention will be explained using the cross-sectional view of FIG. 2.

In FIG. 2, a first silicon semiconductor substrate 1 and a second
A-8: (
Arsenic) is ion-implanted. Thereafter, a thermal oxide film 10 is formed by thermal oxidation, and the heat at this time diffuses the implanted As (arsenic) ions to a predetermined depth, resulting in a high concentration of N.
A medium-sized diffusion layer 2 is formed. Next, a polysilicon layer 3 is deposited on top of the polysilicon layer 3 by low pressure CVD (Chemical Va
For example, 2,000 cells are grown at a growth temperature of 650° C. using the por deposition method.

Next, a thermal oxide film 4 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5. Then, the first silicon semiconductor substrate 1 is inverted onto the second silicon semiconductor substrate 5, and the first and second silicon semiconductor substrates 1 are placed on top of the second silicon semiconductor substrate 5.
．． The mirror-polished surfaces of the first and second
A silicon semiconductor substrate of 1.5 cm is bonded, and then the silicon semiconductor substrate 1 side is polished to a predetermined thickness.

Next, in the bonded first and second silicon semiconductor substrates, a thermal oxide film 6 is formed by thermal oxidation on the first silicon semiconductor substrate 1 disposed in the upper layer, and a cathode electrode is formed using photoresist. The oxide film in the extraction region is removed and, for example, As (arsenic) is ion-implanted and thermally diffused to form a high-concentration N medium-sized diffusion layer 9 for taking out the cathode electrode.
It is formed so as to be in contact with the medium-sized diffusion layer 2. Next, the photoresist is removed, and a new photoresist is used to remove the oxide film in the anode electrode extraction area. For example, B (boron) is ion-implanted and thermally diffused to produce a high concentration of P for the anode electrode extraction. A mold diffusion layer 8 is formed. Next, after removing the photoresist, polysilicon containing P (phosphorus) was deposited on the entire surface and patterned to form anode and cathode electrodes, which were formed using the laminated structure semiconductor substrate of the present invention. A diode according to the second example is manufactured.

According to the diode having such a configuration, the polysilicon layer 3 adjacent to the thermal oxide film 4.10 as a dielectric interposed between two different first and second silicon semiconductors 1 and 5 serves as a getter. The contaminant atoms become the nucleus of the ring and are trapped in the crystal defects of this polysilicon layer 3, so the number of contaminant atoms in the first and second silicon semiconductor substrates 1.5 is significantly reduced. We can provide high performance and highly reliable diodes. In particular, in this embodiment, the dielectric interposed between the two different first and second silicon semiconductor substrates 1.5 is a two-layer thermal oxide film 4.10. The insulation ability between the silicon semiconductor substrates 1.5 is improved.

(3) A diode according to a third embodiment formed using the laminated structure semiconductor substrate of the present invention will be explained using the cross-sectional view of FIG. 3.

In FIG. 3, a first silicon substrate 1 and a second silicon substrate 5 are prepared, and first the first silicon semiconductor substrate 1 is
For example, As (arsenic) is ion-implanted into the mirror-polished surface and thermally diffused to a predetermined depth to form a high-concentration N medium-sized diffusion layer 2. Next, add 5 x 10 P (phosphorus) on top of it.
A polysilicon layer 11 containing atoms/cm3 is grown.

Next, a thermal oxide film 4 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5. Then, the first silicon semiconductor substrate 1 is inverted onto the second silicon semiconductor substrate 5, and the first and second silicon semiconductor substrates 1 are placed on top of the second silicon semiconductor substrate 5.
．． The first and second silicon semiconductor substrates were placed so that their mirror-polished surfaces faced each other and heat-treated in a ClO2 atmosphere at a temperature of 1100' to bond the first and second silicon semiconductor substrates together by a distance of 1.5 cm.
The silicon semiconductor substrate 1 side is polished to a predetermined thickness.

Next, in the bonded first and second semiconductor substrates 1.5, the first silicon semiconductor substrate 1 disposed in the upper layer is
A thermal oxide film 6 is formed thereon by thermal oxidation, and the oxide film in the cathode electrode extraction area is removed using photoresist.
For example, As (arsenic) is ion-implanted and thermally diffused to form a high-concentration N medium-sized diffusion layer 9 for taking out the cathode electrode so as to be in contact with the high-concentration N medium-sized diffusion layer 2 . Next, the photoresist is removed, and a new photoresist is used to remove the oxide film in the anode electrode extraction area.
By ion-implanting and thermally diffusing, a high-concentration P-type diffusion layer 8 for taking out the anode electrode is formed. next,
After removing the photoresist, polysilicon containing P (phosphorus) is deposited on the entire surface and buttered.
Anode and cathode electrodes 7 are formed, and a diode according to the third embodiment formed using the laminated structure semiconductor substrate of the present invention is manufactured.

According to such a diode, 5 P (phosphorus) adjacent to the thermal oxide film 4 which is a dielectric interposed between two different first and second silicon semiconductor substrates 1.5 The polysilicon layer 11 containing
Since these contaminant atoms are trapped in the crystal defects of No. 1, and by including P (phosphorus) in polysilicon, the gettering ability is further increased, as shown in the graph of FIG. The number of contaminant atoms in the first and second silicon semiconductor substrates 1.5 is reduced by -stages, resulting in high performance and
We can provide highly reliable diodes.

(4) A diode according to a fourth embodiment formed using the laminated structure semiconductor substrate of the present invention will be explained using the cross-sectional view of FIG. 4.

In FIG. 4, a first silicon semiconductor substrate 1 and a second
A silicon semiconductor substrate 5 is prepared. First, ions of, for example, As (arsenic) are implanted into the mirror-polished surface of the first silicon semiconductor substrate 1, and thermally diffused to a predetermined depth.
A medium-sized diffusion layer 2 is formed. Next, a polysilicon layer 3 is formed on top of the polysilicon layer 3 by low pressure CVD (Chemical Vap).
growth temperature 6 using the
For example, 2000 cells are grown at 50°C.

Next, a BPSG (boron-phosphosilicate glass) film 12 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5. Then, this second silicon semiconductor substrate 5
Invert the first silicon semiconductor substrate 1 onto the
Place the first and second silicon semiconductor substrates 1.5 with their mirror-polished surfaces facing each other at a temperature of 1100°C and 0.
The first and second silicon semiconductor substrates 1.5 are bonded together by heat treatment in two atmospheres. At this time, the unevenness of the polysilicon layer 3 is filled in by the viscous flow of BPSG (boron-phosphosilicate glass), and the bonding surface becomes stronger. Next, the silicon semiconductor substrate 1 side is polished to a predetermined thickness.

Next, in the bonded first and second semiconductor substrates 1.5, the first silicon semiconductor substrate 1 disposed in the upper layer is
A thermal oxide film 6 is formed thereon by thermal oxidation, and the oxide film in the cathode electrode extraction area is removed using photoresist.
For example, As (arsenic) is ion-implanted and thermally diffused to form a high-concentration N medium-sized diffusion layer 9 for taking out the cathode electrode so as to be in contact with the high-concentration N medium-sized diffusion layer 2 . Next, the photoresist is removed and a new photoresist is used to remove the oxide film in the anode electrode extraction area, and by implanting, for example, ions of B (boron) and thermally diffusing, a high concentration A P-type diffusion layer 8 is formed. Next, after removing the photoresist, polysilicon containing P (phosphorus) is deposited on the entire surface and patterned to form the anode and cathode electrodes 7, which are formed using the laminated structure semiconductor substrate of the present invention. A diode according to the fourth example is manufactured.

According to the diode having such a configuration, the polysilicon layer 3 adjacent to the BPSG film 12 as a dielectric interposed between two different first and second silicon semiconductor substrates 1.5 is a semiconductor device. The contaminant atoms in the first and second silicon semiconductor substrates 1 and 5 act as nuclei for gettering of contaminant atoms when forming the polysilicon layer 3, and are trapped in crystal defects in the polysilicon layer 3. By using a BPSG (boron-phosphosilicate glass) film 12 as a dielectric interposed between the silicon semiconductor substrates, The BPSG (boron-phosphosilicate glass) film 12 becomes viscous due to the heat of the heat treatment in the adhesion process, and this viscous flow fills in the unevenness of the polysilicon layer 3 on the opposite side, making the adhesion of different silicon semiconductor substrates stronger. Become something. Furthermore, similar effects can be obtained by using BSG (boron-silicate glass) or PSG (phosphorus-silicate glass) as the material for this dielectric layer.

(5) As a fifth embodiment, a modification of the example described in the third embodiment in which polysilicon adjacent to the dielectric interposed between two different silicon semiconductor substrates contains P (phosphorus) An example of an insulating layer separated bipolar integrated circuit will be explained using the cross-sectional view of FIG.

In FIG. 5, a first silicon semiconductor substrate 1, a second
A silicon semiconductor substrate 5 is prepared, and first, a mirror-polished surface of the first silicon semiconductor substrate 1 is coated with, for example, As (arsenic).
is ion-implanted and thermally diffused to a predetermined depth to form a high concentration N0 type diffusion layer 2.

Next, on top of that is a polysilicon layer 11 containing P (phosphorus).
grow.

Next, a thermal oxide film 4 is grown on the mirror-polished surface of the second silicon semiconductor substrate 5. Then, the first silicon semiconductor substrate 1 is inverted onto the second silicon semiconductor substrate 5, and the first and second silicon semiconductor substrates 1 are placed on top of the second silicon semiconductor substrate 5.
．． Place it with the mirror-polished surfaces of No. 5 facing each other and set it at a temperature of 1
The first and second silicon semiconductor substrates 1.5 are bonded together by heat treatment at 100° C. in a 02 atmosphere, and then the silicon semiconductor substrate 1 side is polished to a predetermined thickness.

Next, in the bonded first and second semiconductor substrates 1.5, the first silicon semiconductor substrate 1 disposed in the upper layer is
A photoresist is deposited on top to form a pattern for forming an insulating region for element isolation, and a hole for a cable isolation insulating region is opened so as to reach the thermal oxide film 4 of the underlying silicon semiconductor substrate.

Next, the side surface of the hole is oxidized to form an oxide film 6'. A polysilicon layer 3' is then deposited in the hole. next,
The photoresist is removed and new photoresist is deposited to form a base overlay pattern. Then, ions of, for example, B (boron) are implanted into the base formation region. Next, the photoresist is removed, a new photoresist is deposited again, a pattern for forming a collector electrode extraction region 9 and an emitter is formed, and ions of, for example, As (arsenic) are implanted into the collector electrode extraction region 9 and the emitter formation region. Next, a thermal oxide film 6 is deposited over the entire surface by thermal oxidation. At this time,
Due to the heat of thermal oxidation, the implanted ions are diffused to a predetermined depth, forming the base diffusion layer 8 and the emitter diffusion layer 13.
And a collector electrode extraction region 9 is formed. next,
By opening contact holes in these diffusion layers, depositing polysilicon containing P (phosphorus) over the entire surface, and patterning it, base, emitter, and collector electrodes are formed, and the laminated structure semiconductor of the present invention is formed. An insulating layer separated bipolar integrated circuit according to the fifth embodiment is manufactured using a substrate.

According to the insulating layer separated type bipolar integrated circuit having such a structure, the thermal oxide film 4 as a dielectric material is interposed between two different first and second silicon semiconductor substrates 1.5.
The polysilicon layer 11 containing P (phosphorus) adjacent to
This becomes the nucleus for gettering of contaminant atoms when forming a semiconductor device, and the contaminant atoms are trapped in the crystal defects of the polysilicon layer 11 containing P (phosphorous).
and the number of contaminant atoms in the second silicon semiconductor substrate is
It is possible to provide a high-performance, high-reliability insulating layer separated bipolar integrated circuit.

[Effects of the Invention] As explained above, according to the present invention, in a laminated semiconductor substrate formed by adhering two or more different semiconductor substrates with at least one dielectric interposed therebetween, The polycrystalline layer provided as a polycrystalline layer acts as a gettering nucleus for contaminant atoms during the manufacture of semiconductor devices, and the contaminant atoms are trapped in the crystal defects of this polycrystalline layer. The number of carriers is significantly reduced, the lifetime of minority carriers in the semiconductor device elements formed on the semiconductor substrate is improved, the leakage current of the PN junction is reduced, and the manufacturing yield is improved, resulting in high performance and high reliability. A semiconductor device can be provided.

FIG. 6 is a graph showing the lifetimes of the PN junctions of the first to third embodiments as a ratio, assuming that the lifetime of the conventional PN junction shown in FIG. 9 is 1. P (phosphorus) was added to the polysilicon of the third embodiment in an amount of 5×10”a
A remarkable improvement in the PN junction lifetime is observed in all of the examples, including the example in which the PN junction was included.

Figure 7 shows the relationship between the P (phosphorus) Ia degree in the polycrystal adjacent to the dielectric and the lifetime of the PN junction, assuming that the lifetime of the conventional PN junction shown in Figure 9 is 1. This is a graph expressed as a ratio. Basically, the concentration of P (phosphorus) contained in the polycrystal can be any value, but as can be seen from Figure 7, in practical terms, I
s/cm3 or more is desirable.

[Brief explanation of the drawing]

1 to 4 are cross-sectional views of a diode formed using a laminated structure semiconductor substrate according to the present invention, and FIG.
6 is a cross-sectional view of an insulating layer outer door type bipolar integrated circuit formed using a laminated structure semiconductor substrate according to the present invention;
The figure is a graph comparing the lifetimes of the diodes of the first to third embodiments with the lifetimes of conventionally configured MOS diodes. Figure 8 is a graph comparing the concentration of P (phosphorus) in ratios and the lifetime of a diode with a conventional configuration. Po
FIG. 9 is a cross-sectional view of a diode formed using a conventional laminated (1-inch semiconductor substrate). 1... first N-type silicon semiconductor substrate;・・N+
Type scattering layer 3... Polysilicon layer, 3'... Polysilicon layer, 4... Thermal oxide film, 5... Second N-type silicon semiconductor substrate, 5'... Second N0-type silicon semiconductor Koresaka, 6... thermal oxide film, 6゛... thermal oxide film, 7.
...Polysilicon electrode containing phosphorus, 8...P ten-type diffusion layer, 8'...P ten-type base diffusion layer, 9...N ten-type electrode extraction layer, 10...first 11... Polysilicon layer containing phosphorus, 12... BPSG (boron-phosphorus silicate glass) 13... N-type emitter region,
13'...N0 type source/drain diffusion layer, 14...
- Gate 7 hypode, 15...P+ type source/drain diffusion layer, 16...N type diffusion layer. Figure 1

Claims (3)

[Claims] (1) At least two or more semiconductor substrates at least one
A laminated structure semiconductor substrate formed by bonding and interposing two dielectrics, wherein at least one polycrystalline layer is provided adjacent to the at least one dielectric. substrate. (2) The dielectric is boron silicate glass (BSG)
, phosphorus silicate glass (PSG), and boron-phosphorus silicate glass (BPSG). (3) Phosphorus is 10^1^9 atoms/in the polycrystalline layer.
Claim (1) characterized in that it contains cm^3 or more
) or the laminated structure semiconductor substrate according to any one of (2).