JPS63111667A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the annealing time to obtain a required DC current amplification factor and improve radio frequency characteristics by a method wherein insulating films are selectively patterned to be left on the parts corresponding to respective emitter regions and base regions are formed and the formed depths of the respective base regions are reduced at the parts corresponding to the respective emitter regions. CONSTITUTION:A nitride film 3 and an oxide film 4 are patterned and selectively removed by etching so as to be left only on the parts corresponding to respective emitter forming regions. In the surface portion of an epitaxial layer 1, respective base regions 5 are selectively formed by a method such as ion implantation. In the parts under the nitride film 3 and the oxide film 4, base region parts 5a which are shallower than the base regions 5 are so formed as to provide linkage between the respective base regions 5 in the upper parts between the base regions 5. Successively, after respective oxide insulating films 6 are formed, the remaining nitride film 3 and oxide film 4 are removed by etching to drill apertures at the parts corresponding to the emitter forming regions and respective emitter regions 7 are selectively formed by an ion implantation method or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a high-frequency, high-output transistor to improve its characteristics.

[Conventional technology]

FIG. 3 shows a schematic structure of a conventional high-frequency, high-output transistor of this type, and FIGS. 4(a) to 4(e) show steps for manufacturing the same transistor in the order of steps.

That is, in the configuration shown in FIG. 3, reference numeral 1 is an epitaxial layer of a silicon wafer, 2 is a thick oxide film for isolation between elements, and 5 is a layer formed on the surface of the epitaxial layer 1 in an element constituting region. A base region 8 is an oxide insulating film selectively formed on the base region 5; 7 is each emitter region selectively formed in the base region 5; 9a and 9b are these emitter regions; These are electrodes drawn out from the base region 5 and emitter region 7, respectively.

Next, in the method shown in FIG. 4, first, an oxide film 2 is selectively formed on the epitaxial layer 1 of a silicon wafer to divide the epitaxial layer 1 into sections (FIG. 4(a)). For example, in the case of an epitaxial layer of Hy, poron is implanted as an impurity into the surface element forming region by ion implantation to form the base region 5 (FIG. 2(b)).

Next, an oxide film 8 was formed by a CVN (chemical vapor deposition) method, and selectively etched by a photolithography method to form openings in the desired pattern (FIG. 2(C)). By ion implantation, arsenic is implanted as an impurity to form each emitter region 7 (FIG. 4(d)). During this ion implantation, the corresponding portion of the base region is pushed deep into the epitaxial layer 1 due to the so-called extrusion effect.

Furthermore, by photolithography, the oxide film 8 is selectively etched to open the base contact 8 (C in the same figure).
After that, electrodes 9a and 9b are provided to draw out the base region 5 and emitter region 7, and in this way, the high frequency, high output transistor structure shown in FIG. 3 is obtained.

[Problem that the invention seeks to solve]

In the case of conventional high-frequency, high-output transistors, because they are manufactured through the steps described above, when forming each emitter region 7, the corresponding portion of the base region 5 becomes deeper due to the extrusion effect, resulting in a predetermined hFE (direct current). In order to obtain the current amplification factor), it is necessary to take a long annealing time.
As a result, the corresponding base portion becomes deeper, resulting in a problem of deterioration of high frequency characteristics.

This invention was made to solve these conventional problems, and its purpose is to prevent the base portion from being pushed out toward the epitaxial layer when forming an emitter region within the base region. Therefore, it is an object of the present invention to provide a method for manufacturing a semiconductor device of this type, which requires a short annealing time to obtain a predetermined hFE.

[Means for solving problems]

In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes selectively patterning and leaving an insulating film in a portion corresponding to each emitter formation region, and using this insulating film as a mask to form a base region. The formation depth of each base region is made shallow in a portion corresponding to each emitter region.

[For production]

That is, in the method of this invention, since the forming depth of each base region is made shallow in the portion corresponding to each emitter region, when forming each emitter region, each base region is pushed out deeply in the corresponding portion. Therefore, the annealing time required to obtain a predetermined hFE can be shortened, and as a result, the high frequency characteristics can be improved.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 2 and 3.

FIG. 1 is a cross-sectional view schematically showing the general structure of a high-frequency, high-output transistor obtained by this example method, and FIG.
) to e) are sectional views showing the steps for manufacturing the above transistor in order of process.

In each figure of these embodiments, the same reference numerals as in the conventional example indicate the same or corresponding parts.

In other words, in the configuration of the embodiment shown in FIG. 1 as well, reference numeral 1 is an epitaxial layer of a silicon wafer, 2 is a thick oxide film for isolation between elements, and 5 is a layer on the surface of the epitaxial layer l, which is an element constituting region. Each base region 8 is successively formed in each region portion 5a, each oxide insulating film selectively formed on the base region 5, and 7 each base region 5. ．． As shown, each emitter region 9a is selectively formed in each region portion 5a.
llb are these base regions 5.llb. These are electrodes drawn out from the emitter region 7, respectively.

However, as shown in FIG. 2, in this embodiment method,
First, an oxide film 2 is selectively formed on the surface of an epitaxial layer l of a silicon wafer, and an element configuration φ is formed on the same layer 1.
In addition to dividing the areas, a nitride film 3. and oxide 1114 are sequentially formed thinly (1iffl(a)).

Next, by patterning the nitride film 3.4 and the nI oxide film by photolithography or the like, the nitride film 3.
Then, using the patterned films 3 and 4 as a mask, the surface of the epitaxial layer 1 is etched by ion implantation to form, for example, an N-type epitaxial layer. If,
Poron is implanted as an impurity to selectively form each base region 5 (FIG. 1(b)).

At the same time, a patterned nitride film 3. and oxide film 4
Even if it is below, the base area portions 5 are connected at the upper part between each base area 5, and the base area portions 5 are shallower than the same area 5.
a will be formed.

Subsequently, after each oxide insulating film 6 is formed on each of the ion-implanted base regions 5 (FIG. 6(c)), the patterning is performed. Each nitride film 3. is left as an ion implantation mask. Then, by etching and removing the oxide film 4, a portion corresponding to the emitter formation region was opened."2. Next, using each oxide film 6 as a mask,
Each base region 5. In this case, an N-type epitaxial layer is formed by ion implantation or the like into each base portion 5a connecting each base region 5.
Arsenic is implanted as an impurity, and each emitter region 7 is selectively formed (FIG. 4(d)).

Also, in this ion implantation, each base region portion 5a is pushed out into the epitaxial layer 1 by the so-called extrusion effect, as in the case of the conventional example, but each base region portion 5a is first As mentioned above, since the upper part between each base region 5 is formed shallower than this, it is not pushed out below the individual base regions 5.

Furthermore, each of the oxide films 6 is formed by photolithography or the like.
are selectively etched to form the base contact 8.
((e) in the same figure), and then.

Each of these base areas5. By respectively providing electrodes 8a and 9b for drawing out the emitter region 7, the desired high-frequency, high-output transistor structure shown in FIG. 1 is finally obtained.

Therefore, in the case of this embodiment method, a base region is formed by selectively leaving a nitride film and an oxide film as an ion implantation mask in advance in a portion corresponding to each emitter formation region, and
As a result, since the formation depth of each base region in the portion corresponding to each emitter region is made shallow, there is a risk that each base region in the corresponding portion may be pushed out deeply when forming each emitter region. Therefore, a given hFE
It takes only a short annealing time to obtain this, and as a result, its high frequency characteristics can be improved.

In the above embodiments, the case where an N-type epitaxial wafer is used is described, but the present invention can be similarly applied to the case where a P-type epitaxial wafer is used. It can also be applied to other integrated circuit elements.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, a nitride film and an oxide film are selectively patterned and left in portions corresponding to each emitter formation region on a silicon wafer, and
Using this as a mask, each base region was formed, and the formation depth of each base region was made shallow in the part corresponding to each emitter region, so when forming each emitter region, the depth in the corresponding part was reduced. There is no risk of extruding each base region deeply, so the annealing time required to obtain a predetermined hFE can be shortened, and high frequency characteristics can be improved. Furthermore, each emitter region can be self-aligned. In addition, by controlling the nitride film width to be narrow, the base resistance directly under each emitter region can be reduced, and high frequency characteristics can be further improved.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view schematically showing the general structure of a high-frequency, high-output transistor obtained by a method according to an embodiment of the present invention, and FIGS. FIG. 3 is a cross-sectional view schematically showing the general structure of a conventional high-frequency, high-output transistor, and FIGS. 4(a) to 4(e) are cross-sectional views showing the manufacturing means of the same transistor in order of process. It is a diagram. 1.1 Epitaxial layer on silicon wafer, 3.4
...Nitride film and oxide film, 5.. Base region, 6.. Oxide film, 7.. Emitter region, 8.
...Base contact. Agent Masuo Oiwa Figure 1

Claims (1)

[Claims] Using the nitride film and oxide film patterned on the portion of the silicon wafer corresponding to the emitter formation region as a mask,
A step of implanting impurities into the element configuration region and selectively forming each base region connected under the mask at least deeper than the connected region, and forming an oxide film on each of the base regions. After removing the mask and opening the connection region corresponding to the emitter formation region, using the oxide film on each base region as a mask, impurities are implanted into the connection region, Manufacturing a semiconductor device comprising the steps of selectively forming each emitter region, and selectively etching away the oxide film on each base region to open a base contact. Method.