JPS63102353A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve on the voltage-withstanding capability of a gate and to realize an optimal migration speed by a method wherein a device is constructed of a bipolar transistor built on an Si-film substrate of a plane orientation (111) and a MOS transistor built on an Si-film substrate of a plane orientation (100) positioned over that Si-film. CONSTITUTION:By heat treatment in a laser beam 8 projected from above, a polycrystalline Si film 7' is converted into a single-crystal Si film 7 of a plane orientation (100). On the single-crystal Si film 7, a resist film 9 is formed in a region where a MOS transistor will be built, and is patterned. Further, on the single-crystal Si film 7, a MOS transistor diffusion layer 10a is formed, which is followed by the formation of an SiO2 film that covers the entire surface. A process follows wherein an electrode 5b is built in a diffusion layer 5a for the construction of a bipolar transistor 5 and an electrode 10b is built in a diffusion layer 10 for the construction of a MOS transistor 10.

Description

[Detailed Description of the Invention] [Summary] The present invention solves the conventional problems in a semiconductor device based on PiCMO3, in which the gate breakdown voltage of the MOS transistor deteriorates and the mobility of the bipolar transistor does not reach its optimum value. Transistor Si
litm with plane orientation (111), and M on this Si substrate.
OS transistor Sit! By forming the plate in the plane orientation (100), the gate breakdown voltage of the MOS transistor is improved, while the mobility of the bipolar transistor is made to be optimal In.

[Industrial application field]

The present invention relates to a semiconductor device, and particularly to a so-called pie CMO8 semiconductor device in which a bipolar transistor and a MO8t-transistor are mixed on the same chip. Like this 2
In a device in which transistors of different types and properties coexist, it is necessary to operate each transistor under optimal conditions.

(Prior art) Fig. 2 shows a schematic top view of an example of a conventional semiconductor device using a pie CMO3. It is formed.

In this case, the bipolar transistor 2 is generally advantageous for high-precision analog processing and electric quadrupillary operation, while the MOS transistor 3 is advantageous for high integration and low power consumption. In this way, two types of transistors are used depending on the purpose.

[Problem that the invention seeks to solve]

In the conventional device described above, when the Si substrate 1 has a plane orientation of (100) and lζ, there is no problem in 1) for the MOS i-transistor 3, but there is a problem that the mobility of the bipolar transistor 2 is not the optimum value. Ta. On the other hand, a platform using a (111) plane orientation on the Si substrate 1 does not have any particular problem with the bipolar transistor 2, contrary to the above, but since there are many interface states of the MOS transistor 2, the gate breakdown voltage There was a problem that it worsened.

In other words, the conventional device has a problem in that it is not possible to operate either the MOS t-transistor 3 or the bipolar transistor 2 under optimal conditions no matter which surface orientation is used for the Si It plate 1.

[Failure to solve the problem]

As shown in No. 10, the device of the present invention includes a bipolar transistor 5 formed based on a Si film 4 with a plane orientation (111), and an upper plane orientation on a portion of the Si film where the bipolar transistor 5 is not formed. (100) Si film 7
The MOS transistor 10 is formed using a substrate as a substrate.

(Function) The Si substrate 7 of the MOS transistor 10 has a surface orientation (100
) is used, so there are not many interface states, and the gate breakdown voltage can be improved, and -1, and the (111) plane orientation is used for the 81 substrate 4 of the bipolar transistor 5, so the mobility is optimized. It can be a value.

〔Example〕

Figure 1 shows the manufacturing process of one embodiment of the device of the present invention.
It is a location diagram. First, in the same figure (A), the surface orientation (11
A diffusion) 15a of a bipolar transistor (to be described later) is formed on the Si substrate 4 of (+), and then 5iOzA! is deposited thereon as shown in FIG. A dioxide film 6 is formed, and a poly-Si film 7' is further formed thereon.

Next, as shown in FIG. 4C, when a heat treatment is performed by irradiating the laser beam 8 from above, the 0η poly-Si film 7' becomes a single Si film 7 with a plane orientation of (100). In this case, generally, when a 5ii1v film is laser annealed, the direction perpendicular to the thin film tends to have a (100) plane orientation. Single S1
The film 7 is a Si substrate of a MOS transistor to be described later.

Next, as shown in FIG. 3D, a resist film 9 is provided on the surface of the single Si film 7 at a portion where a MOS l-transistor to be described later will be formed, and patterning is performed. By this patterning, as shown in the same figure (E), a single Si film 7 for bipolar transistor n5 and
2 Wa (tJ film 6 <1 kn 3 t'L, M
Single 5illQ7 and 51 of OS transistor part
02 oxide 6 remains.

Furthermore, as shown in FIG. 6(F), MO is applied to the single Si film 7.
A diffusion layer 10a of the S transistor is formed, and then a SiOzMi film 11 is formed over the entire surface. Next, a bipolar transistor 5 is formed by providing an electrode 5b on the diffusion layer 5a, and an upper electrode 10 is provided on the diffusion layer 10a.
MOS transistor 10 is formed by providing b.

As is clear from FIG. (100), and as a result, there are no many interface states unlike in the conventional device, and the gate breakdown voltage can be improved. In other words, the device of the present invention can operate the bipolar transistor 5 and the MOS transistor 10 under optimal conditions.

(Effects of the Invention) According to the present invention, since the 3 i It plate of the MOS transistor has a plane orientation of (100), the gate breakdown voltage is improved to 1q, while the S1 base plate of the bibolar transistor has a plane orientation of (111). ), it is possible to set the transfer degree to an optimum value, which in turn allows each transistor to operate under optimal conditions, making it possible to obtain a semiconductor device of higher quality than conventional devices, etc. Right features.

[Brief explanation of the drawing]

FIG. 1 is a schematic sectional view showing the manufacturing process of an embodiment of the device of the present invention, and FIG. 2 is a schematic sectional view of an example of a conventional device. In the figure, 4 is a Si substrate with a plane orientation of <111), 5 is a bipolar transistor, 5a and 10a are expanded a layers, 5b and 10b are electrodes, 6.11 is a 5102 oxide film, and 7 is an 81 with a plane orientation of (100). The substrate 10 is a MOS transistor. Honestly, it's a huge amount of magic! 1st cover
Diagram (I)

Claims (1)

[Claims] A bipolar transistor (5) formed using a Si film (4) with a (111) plane orientation as a substrate, and a part of the Si film (4) with a (100) plane orientation above the Si film (4) where the bipolar transistor (5) is not formed. A semiconductor device comprising a MOS transistor (10) formed using a Si film (7) as a substrate.