JPS6039848A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To connect a high melting-point metal and a second metallic layer positively by selectively etching a metallic oxide formed on the high melting- point metallic layer by an aqueous solution, etc. containing ammonia and exposing the metal. CONSTITUTION:A polycrystalline silicon gate electrode 4 and a gate oxide film 3 are formed on a P type silicon substrate 1 through a photoetching method, and arsenic ions are implanted to shape N<+> diffusion layers 5. The surfaces are coated with a SiO2 film, a SiO2 film 6 is left on the side wall of a gate through reactive ion etching (RIE), tungsten films 7 are formed on a source and a drain and a gate electrode, and the surfaces are coated with a SiO2 film 8. Connecting holes 101-103 are formed through RIE while using a resist film 9 as a mask for shaping the connecting holes, and a resist is removed by an oxygen plasma incinerator. Tungsten oxides 11 are formed on the surfaces of the tungsten films 7 at that time. Only the tungsten oxides 11 are etched selectively and removed by using an aqueous solution containing ammonia, and aluminum layers 12 as second metallic wiring layers are formed.

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to four methods for manufacturing a semiconductor device. ¥411] related to connection technology.

[Conventional technology and m points in between]

In recent years, expectations for higher integration of semiconductor circuits have risen to 1.
ing. With higher integration, element dimensions inevitably need to become smaller or larger. The layers tend to be shallower and thinner. As the element size is made smaller, the electrical resistance naturally becomes higher and the reaction speed of the element becomes slower ('l-)'C. Currently, polycrystalline silicon is often used for the gate wiring Iv! of 1 (phantom S-DRAM), but there is a tendency for metal silicide, which is a lower resistance material, or high-melting point metal to be used instead. It is in.

Conventionally, connection holes for interconnections were made by etching with a solution, but as device dimensions became smaller and microfabrication became essential, the Bakun transform difference became more important. Reactive ion edging (RIE) with less
The technology is starting to be used extensively. Using the resist surface patterned by photolithography as a mask, loquat M on tungsten, which is C1 high melting point Kanagawa, or seven-ribnan.
: 14] When forming the closing hole by RIE,
Damage caused by RIIC causes a phenomenon in which the surface of the resist film changes in quality by 1XtS. This altered resist is easily dissolved in the organic layer and improved. For this reason, there has been a method of removing this resist film using an oxygen plasma ashing device. but,
If this method is used, the high melting point metal exposed in the connection hole is oxidized and the surface becomes a metal oxide. Therefore, it becomes impossible to make contact with the second metal covering layer that will be formed subsequently, resulting in electrical insulation, resulting in a problem that the desired conduction between the wirings cannot be obtained.

[Purpose of the invention]

The present invention has been made to improve the above-mentioned problems, and an object of the present invention is to provide a manufacturing method for realizing a highly reliable semiconductor device by ensuring the connection between a high melting point metal layer and a second metal layer. do.

[Requirements for invention]

That is, the present invention selectively etches a metal oxide formed on a high melting point metal layer (tungsten or molybdenum) with an aqueous solution containing ammonia, and waits for t to release the metal. It is something.

〔Effect of the invention〕

According to the present invention, a semi-conductor using a refractory metal no. (g) In the body element, RIE can be used to form the connection hole between the t-1 melting point metal scrap and the second metal layer, and an oxygen plasma ashing device can be used in the subsequent resist removal process. I can do it. Therefore, the fine connection holes enable reliable connection between the high melting point metal and the second metal layer. Therefore, it greatly contributes to higher integration of elements and higher speed Di11 production.

[Embodiments of the invention]

Hereinafter, a detailed explanation will be given of the power folding to which the present invention is applied, with reference to the drawings.

FIG. 1 (d1) is a process cross-sectional view showing the manufacturing process of a MOSFET as an embodiment of the present invention. That is, a P-type zolinium substrate 1 of 6 to 8 Ω is thermally oxidized according to the LoCos process, and a field oxide film 2 is formed. 11) Then, thermal oxidation is performed to form an oxide film with a thickness of 400A in the element region, and on top of that, an oxide film of LPCV is formed.
After laminating a 3000X polycrystalline silicon film by the D method, a polycrystalline silicon gate electrode 4 is formed by photolithography.
．． and gate oxide film 3 is formed. t-1 of this structure
:, arsenic at an acceleration voltage of 40 KeV and a dose of 11f, 3
After X 1015GFrL2 ion implantation, 6()0
A heat treatment is performed for 180 minutes to form a shallow n'' diffusion layer 5.

, y et al., a 5iO2 film is formed by CVD, and a 5iOz film 6 is left on the gate sidewalls by reactive ion etching (a). With this structure in place, a tungsten film 7 is selectively formed on the source/drain and gate electrodes using the CM method. In this case, using the plasma method,
To 2 film 8 is covered, and fj 00' (3 @ processing is carried out!) to densify the 5i02 film 8. After this, a resist film 9 is laminated and patterned by photolithography to form connection holes. Pass through the mask V and form a connection hole (10+ +102,11):4) with r<rrr (b)
. At this age, the resist surface changes in quality. The resist is removed using an oxygen plasma ashing device. In this process,
The surface of the tungsten film 7 is polished to form a tungsten oxide 11 (c).

Using an aqueous solution containing ammonia, only the tungsten oxide 11 is selectively etched and removed. Next, after forming an aluminum layer 12 which is a second metal wiring layer using a sputtering method, using a resist layer patterned by photolithography as a mask, the aluminum Nlz 7') is formed.
t Etch the shape of the elephant using a phosphoric acid solution ω).

With the above, the I
VIO8F'ET is completed. The tungsten/aluminum connection, which has been a problem since the 4rYL, can be made reliably, and it is also made of wood, which is smaller in five dimensions and allows for higher integration and higher speed operation.

Book 5I: In the example, application to zvlO8FE'l' was shown L7, but tanksten or (l:I: =4 uribdenum) with high melting point If the manufacturing method of the semiconductor device 1i'I- using IjIE and r1'2 plasma ashing device is made by opening the second gold k)6 layer and connecting it with the second gold layer, the present invention can be applied. Apply “
I can do that.

As mentioned above, using the present invention, f+, C1: using high-melting point metal wiring, 1, having a cross-section connection with the second metal wiring, A; high integration of highly reliable elements. , high speed dif
The seventh production became i] Noh.

[Brief explanation of the drawing]

:411n+1&yo, as an example of a small invention) SF
ETLI') 1-2 is a simplified two-root circuit diagram showing the manufacturing process. ■ ・P heli-silicon substrate, 2...Field IIυ conversion'+"\, 3...Gate 1-layer film, 4...Polylipid crystal Norini J gate": Upper electrode, Fi-n expansion Layer, 6 ・
-・S t(',)211il庳P, 7. , tungsten layer, 8... 1 box of oxide, 9... resist'
to, 10.10+, 102. L(1+<...connection hole,
11...Tungsten oxide, 12...Aluminum wiring. Figure 1

Claims (1)

[Claims] (1) A step of forming a first metal wiring layer on a semiconductor substrate on which an impurity diffusion layer is formed, a step of depositing an insulating film on the metal wiring layer, and a step of depositing an insulating film on the insulating film by photolithography. Using the patterned resist film as a mask, a step of forming connection holes between metal wiring layers by reactive ion etching technology, a step of removing the resist film with an oxygen plasma ashing device, and a step of removing the resist film with oxygen plasma on the metal wiring film. The metal oxide film formed in the ashing process is
The selectivity of etching with trioxide is determined by the step of etching with a solvent and the subsequent second metal layer (2) where the first metal layer is tungsten or molybdenum;
The solvent for etching the metal oxide film on the first metal wiring layer is water containing ammonia.