JPS6280733A - Information processor - Google Patents

Abstract

PURPOSE:To prevent an information processor from machine down due to the failure of hardware by checking whether an interruption vector address is correct or not by a microprogram. CONSTITUTION:The microprocessor 1 is connected to an interruption control LSI 2 through an interruption signal line 3 and a data line 4. When detecting an interruption, the LSI 2 informs the detection to the microprocessor 1 through the signal line 3. Receiving the information, the microprocessor 1 reads out an interruption vector address from the LSI 2. The microprocessor 1 checks whether the interruption vector is included within a correct range or not, and when the vector is correct, continues the interruption processing. If the vector exists outside the range, the microprocessor 1 executes error processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device, and particularly to an information processing device having an interrupt control function.

[Conventional technology]

Conventional information processing devices read the interrupt vector address from the interrupt control LSI and create an interrupt processing entry for each stock based on the interrupt vector address.In particular, it is necessary to check the interrupt vector address. was not there.

[Problem that the invention seeks to solve]

As mentioned above, the above-mentioned conventional information processing apparatus has the disadvantage that when the interrupt control L8I fails and an invalid interrupt vector address is read, an invalid interrupt processing entry is created, causing a machine failure. there were.

[Means for solving problems]

The information processing device of the present invention is configured to include a microprogram that checks whether an interrupt vector address is valid.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the information processing device shown in FIG.
1 is connected to an interrupt control LSI 2 via an interrupt signal line 3 and a data line 4. When the interrupt control LSI 2 detects an interrupt, it notifies the microprocessor 1 of the interrupt via the interrupt signal line 3. When the microprocessor S1 receives the notification, it reads the interrupt vector address from the interrupt control L8I2 via the data line 4.

Microprocessor yt1 checks whether the interrupt vector is within the correct range based on the flowchart as shown in FIG. Perform error handling.

That is, when an interrupt occurs in operation step S1, the interrupt vector address is read out in operation step S2. This interrupt vector address is checked in operation steps 83 and 84 to see if it is smaller than the legal maximum value and larger than the legal minimum value, and if it is within the range, operation step S5 is performed.
interrupt processing is performed, and if it is out of range, the operation status is
Error processing is performed in step S6.

〔Effect of the invention〕

The information processing device of the present invention has the advantage that by checking whether the interrupt vector address is correct using a microprogram, it is possible to prevent the machine from going down due to a hardware malfunction or the like.

[Brief explanation of drawings]

FIG. 1 is a diagram showing one embodiment of the present invention, and FIG. 2 is a 70-chart for explaining the operation of the embodiment shown in FIG. l...Microprocessor, 2...Interrupt control LS1.3...-Interrupt signal line, 4...
...Data line, S1 to S6... Operation step. Agent Patent Attorney Susumu Uchihara Diagram Z

Claims (1)

[Claims] An information processing device characterized in that a microprogram checks whether an interrupt vector address is within a valid range, and performs error processing if it is outside the valid range.