JPS627985B2 - - Google Patents

Info

Publication number
JPS627985B2
JPS627985B2 JP54091413A JP9141379A JPS627985B2 JP S627985 B2 JPS627985 B2 JP S627985B2 JP 54091413 A JP54091413 A JP 54091413A JP 9141379 A JP9141379 A JP 9141379A JP S627985 B2 JPS627985 B2 JP S627985B2
Authority
JP
Japan
Prior art keywords
shift register
scan
address
logic
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54091413A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5614966A (en
Inventor
Hidekyo Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9141379A priority Critical patent/JPS5614966A/ja
Publication of JPS5614966A publication Critical patent/JPS5614966A/ja
Publication of JPS627985B2 publication Critical patent/JPS627985B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP9141379A 1979-07-18 1979-07-18 Scan-out circuit Granted JPS5614966A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9141379A JPS5614966A (en) 1979-07-18 1979-07-18 Scan-out circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9141379A JPS5614966A (en) 1979-07-18 1979-07-18 Scan-out circuit

Publications (2)

Publication Number Publication Date
JPS5614966A JPS5614966A (en) 1981-02-13
JPS627985B2 true JPS627985B2 (OSRAM) 1987-02-20

Family

ID=14025686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9141379A Granted JPS5614966A (en) 1979-07-18 1979-07-18 Scan-out circuit

Country Status (1)

Country Link
JP (1) JPS5614966A (OSRAM)

Also Published As

Publication number Publication date
JPS5614966A (en) 1981-02-13

Similar Documents

Publication Publication Date Title
JP3262593B2 (ja) 埋込みｒａｍ用の構成可能な自己検査方法及び回路
US8156391B2 (en) Data controlling in the MBIST chain architecture
JPH0645451A (ja) 半導体記憶装置
JPH0374796B2 (OSRAM)
US4205301A (en) Error detecting system for integrated circuit
US20170363685A1 (en) Implementing prioritized compressed failure defects for efficient scan diagnostics
JPS6125173B2 (OSRAM)
D Kumar An efficient fault detection of FPGA and memory using built-in self test [BIST]
JPS627985B2 (OSRAM)
US6959409B2 (en) Design for test of analog module systems
US6421810B1 (en) Scalable parallel test bus and testing method
JP2773148B2 (ja) テスト容易化回路設計方法
JPS6336534B2 (OSRAM)
US11069422B1 (en) Testing multi-port array in integrated circuits
KR100345673B1 (ko) 자기 진단 가능한 집적 회로
JPS6032213B2 (ja) 論理装置の診断方式
JPS6142299B2 (OSRAM)
JP3180303B2 (ja) プリント板における論理素子間接続状態の診断方法
JPH05334116A (ja) デバッグ制御方式
JPH0997194A (ja) フェイルメモリのデータ取得装置
JPH02248877A (ja) 論理回路パッケージ
JPS63174141A (ja) 情報処理装置の試験診断方式
JP2000285698A (ja) メモリ試験装置
JPS6039186B2 (ja) 半導体素子
JPH0746125B2 (ja) スキャンテスト制御回路