JPS6277655A - Substrate trouble diagnosing circuit for programmable controller - Google Patents

Substrate trouble diagnosing circuit for programmable controller

Info

Publication number
JPS6277655A
JPS6277655A JP60216201A JP21620185A JPS6277655A JP S6277655 A JPS6277655 A JP S6277655A JP 60216201 A JP60216201 A JP 60216201A JP 21620185 A JP21620185 A JP 21620185A JP S6277655 A JPS6277655 A JP S6277655A
Authority
JP
Japan
Prior art keywords
input
board
output
substrate
trouble
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60216201A
Other languages
Japanese (ja)
Inventor
Michio Kitakanji
北寒寺 通夫
Masataka Adachi
足立 政隆
Yuji Niihara
新原 勇二
Satoshi Ono
智 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Engineering Corp
Toshiba Corp
Original Assignee
Toshiba Engineering Corp
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Engineering Corp, Toshiba Corp filed Critical Toshiba Engineering Corp
Priority to JP60216201A priority Critical patent/JPS6277655A/en
Publication of JPS6277655A publication Critical patent/JPS6277655A/en
Pending legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To diagnose an input and an output substrate periodically in substrate units during the operation of a trouble diagnosing device by indicating trouble if a pulse signal inputted to the input substrate changes in state. CONSTITUTION:A pulse train 13 having a constant period is inputted as an output 8 to the bits 6 of input substrates 1A-1C for control from the bit 7 of an output substrate 4 dedicated to an input substrate trouble diagnosis and inputted to a state change detecting circuit 14 for the input substrates. When none of the input substrates is abnormal, the pulse train signal 13 is supplied to the input 6 of a state change detecting circuit 14 as it is and its output 23 is also a pulse train, but if opening or closing trouble occurs, the input 6 becomes 1 or 0 and the output 23 also becomes 1 or 0; and a timer 15 operates, and an output 12 becomes 1, and a pilot lamp 16 illuminates to make a display. An input substrate 2 dedicated to output the substrate trouble diagnosis operates similarly to diagnose output substrates 3A-3C for control.

Description

【発明の詳細な説明】 [発明の技術分野〕 本発明は、プログラマブルコントローラの入力基板およ
び出力基板の故障を基板単位で診断するプログラマブル
コントローラの基板故障診断回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a board failure diagnosis circuit for a programmable controller that diagnoses failures of input boards and output boards of a programmable controller on a board-by-board basis.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

一般に、プログラマブルコントローラの故障診断は、ウ
ォッチドッグタイマ、パリティエラー、CPU停止、シ
ーケンス命令検証など制御装置本体の故障診断、入力基
板、出力基板の実装チェックおよびアナログ入力基板の
一括表示のみを行っており、入力、出力基板単位の故障
診断は行われていない。
In general, fault diagnosis for programmable controllers only involves diagnosing faults in the control device itself, such as watchdog timer, parity error, CPU stop, sequence command verification, checking the mounting of input boards and output boards, and collectively displaying analog input boards. , failure diagnosis for each input and output board is not performed.

このため、入力基板または出力基板に故障が発生したと
きは、故障は検出できても、どの基板が故障かを判別す
るのに時間がかかったり、故障基板を交換するために制
御装置本体を停止させる必要があり、プラントの運転に
故障をきたすという問題がある。
Therefore, when a failure occurs in the input board or output board, even if the failure can be detected, it may take time to determine which board is at fault, or the control unit must be stopped to replace the faulty board. There is a problem in that this may cause malfunctions in plant operation.

〔発明の目的〕[Purpose of the invention]

本発明は、入力基板および出力基板の故障診断を装置の
運転中に基板単位で周期的に実行するプログラマブルコ
ントローラの基板故障診断回路を提供することを目的と
している。
SUMMARY OF THE INVENTION An object of the present invention is to provide a board failure diagnosis circuit for a programmable controller that periodically performs failure diagnosis of an input board and an output board on a board-by-board basis during operation of the device.

〔発明の概要〕[Summary of the invention]

本発明は、一定周期のパルス信号を発生して各入力基板
の所定のビットに入力する入力基板故障診断用出力基板
と、各出力基板からの一定周期のパルス信号を入力する
出力基板故障診断用入力基板と、上記各入力基板に入力
されたパルス信号、の状態変化を検出する状態変化検出
回路と、上記状態変化が発生したとき故障表示する表示
回路を備え、これによって各入力基板および出力基板を
装置の運転中に基板単位で周期的に故障診断できるプロ
グラマブルコントローラの基板故障診断回路である。
The present invention provides an output board for fault diagnosis of an input board that generates a pulse signal of a constant period and inputs it to a predetermined bit of each input board, and an output board for fault diagnosis of an output board that inputs a pulse signal of a constant period from each output board. It includes a state change detection circuit that detects a change in the state of the input board and the pulse signal input to each input board, and a display circuit that indicates a failure when the above state change occurs. This is a circuit board failure diagnosis circuit for a programmable controller that can periodically diagnose failures on a board-by-board basis while the device is operating.

〔発明の実施例〕[Embodiments of the invention]

本発明の一実施例を第1図に示す。 An embodiment of the present invention is shown in FIG.

第1図において、 IA、IB、ICは制御用の入力基
板、2は出力基板故障診断専用の入力基板、3A 、 
3B 、 3Cは制御用の出力基板、4は入力基板故障
診断専用の出力基板、5は故障表示用基板である。
In Fig. 1, IA, IB, and IC are input boards for control, 2 is an input board dedicated to output board failure diagnosis, 3A,
3B and 3C are output boards for control, 4 is an output board dedicated to input board fault diagnosis, and 5 is a fault display board.

各入力基板IA、IB、ICおよび2の1つのビット6
にはそれぞれ入力基板故障診断専用の出力基板4の各ビ
ット7の出力8が入力される。
One bit 6 for each input board IA, IB, IC and 2
The output 8 of each bit 7 of the output board 4 dedicated to input board failure diagnosis is input to each of the input boards.

また各出力基板3A 、 3B 、 3Gおよび4の1
つのビット9からの出力10は出力基板故障診断専用の
入力基板2の各ビット11に入力される。
In addition, each output board 3A, 3B, 3G and 4-1
Outputs 10 from the two bits 9 are input to each bit 11 of the input board 2 dedicated to output board failure diagnosis.

故障が発生すると、故障信号が故障表示用基板5の対応
するビット12に入力され、これによって基板単位で故
障表示が行われる。
When a failure occurs, a failure signal is input to the corresponding bit 12 of the failure display board 5, thereby indicating a failure on a board-by-board basis.

第2図は故障診断回路の動作を示すブロック図であり、
第2図(A)は入力基板診断用、第2図(8)は出力基
板診断・用を示している。
FIG. 2 is a block diagram showing the operation of the fault diagnosis circuit.
FIG. 2(A) shows the input board diagnosis, and FIG. 2(8) shows the output board diagnosis.

すなわち第2図(A)において、入力基板故障診断専用
の出力基板4の4つのビット7からは一定周期のパルス
列13が出力8として対応する入力基板の1つのビット
6に入力され、入力基板の状態変化検出回路14の入力
となる。
That is, in FIG. 2(A), from the four bits 7 of the output board 4 dedicated to input board failure diagnosis, a pulse train 13 of a constant period is inputted as an output 8 to one bit 6 of the corresponding input board, and the pulse train 13 of the input board It becomes an input to the state change detection circuit 14.

入力基板に異常がなければパルス列信号13はそのまま
状態変化検出回路14の入力6となり、その出力23も
パルス列となるが、入力基板に開または閉の故障が発生
していると、入力6は11′または110′のどちらか
一方になり、出力23も11′または%O′の何れかに
なり、一定時間経過しても状態変化を生じない。
If there is no abnormality in the input board, the pulse train signal 13 becomes input 6 of the state change detection circuit 14, and its output 23 also becomes a pulse train. However, if an open or close failure occurs in the input board, input 6 becomes 11. ' or 110', and the output 23 also becomes either 11' or %O', and the state does not change even after a certain period of time has elapsed.

第3図は上記状態変化検出回路14のロジックシーケン
スを示す図であり、その各部動作波形は例えば第4図に
示すようになる。第4図で(A)は正常時、(B)は故
障時の場合を示しており、Toはスキャンタイムである
FIG. 3 is a diagram showing the logic sequence of the state change detection circuit 14, and the operation waveforms of each part thereof are as shown in FIG. 4, for example. In FIG. 4, (A) shows the normal state, (B) shows the faulty state, and To is the scan time.

すなわち正常時は第4図(ム)に示すように状態変化検
出回路14の出力23は周期T1のパルス列となり、T
□より長い時限T2をもっているタイマ15が動作せず
、従ってその出力12は″0′のままに保持され、表示
灯16には表示が現われない。
That is, under normal conditions, the output 23 of the state change detection circuit 14 becomes a pulse train with a period T1, as shown in FIG.
□The timer 15 having a longer time limit T2 does not operate, so its output 12 remains at "0" and no display appears on the indicator light 16.

時点t1に故障が発生すると、第4図(B)に示すよう
に出力23のパルス列が停止し、パルス列停止 ・後T
2(T、>T1)にタイマ15が動作して出力12が1
1′となり1表示灯16に表示が現われ、故障発生を表
示するので、これによって基板の故障診断を周期的に継
続して行うことができる。
When a failure occurs at time t1, the pulse train of output 23 stops as shown in Fig. 4 (B), and the pulse train stops.
2 (T, > T1), timer 15 operates and output 12 becomes 1.
1', a display appears on the 1 indicator light 16 to indicate the occurrence of a failure, so that fault diagnosis of the board can be periodically and continuously carried out.

なお第2図(A)において、入力基板故障診断専用出力
基板異常信号17の否定18と、状態変化検出回路14
の出力の論理積19をタイマ15に入力しているのは、
状態変化の原因が入力基板故障診断専用出力基板4の異
常によるものでないことをチェックするためである。
In addition, in FIG. 2(A), the negation 18 of the output board abnormality signal 17 dedicated for input board failure diagnosis and the state change detection circuit 14
The reason why the logical product 19 of the outputs of is input to the timer 15 is as follows.
This is to check that the cause of the state change is not due to an abnormality in the output board 4 dedicated to input board failure diagnosis.

第2図(II)は出力基板の故障診断用であるが、その
動作は第2図(A)の場合と同じであり、 その説明は
省略する。
Although FIG. 2 (II) is for fault diagnosis of the output board, its operation is the same as that in FIG. 2 (A), and its explanation will be omitted.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、入力基板および出
力基板の間または閉の故障を基板単位で周期的に診断し
て故障表示することが可能となり、故障基板の発見と修
復を容易にしてシステム全体の信頼性を向上することが
可能となる。
As explained above, according to the present invention, it becomes possible to periodically diagnose and display the failure between the input board and the output board or the failure on a board-by-board basis, making it easier to find and repair the faulty board. It becomes possible to improve the reliability of the entire system.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す基板構成図、第2図(
A)、 (B)はそれぞれ入力基板および出力基板の故
障診断回路を示すブロック図、第3図は第2図(A)、
 (B)における状態変化検出回路のロジック図、第4
図(A)、 (B)は第3図の動作をぞれぞれ正常時の
場合および故障時の場合について示す各部信号波形図で
ある。 ■A〜IC・・・入力基板 2・・・出力基板故障診断専用入力基板3A〜3C・・
・出力基板 4・・・入力基板故障診断専用出力基板5・・・故障表
示用基板 14・・・状態変化検呂回路15・・・タイ
マ     16・・・表示灯代理人 弁理士 猪股祥
晃(ほか1名)第1図 (A)      (B) 第2図
Figure 1 is a circuit diagram of a board showing an embodiment of the present invention, and Figure 2 (
A) and (B) are block diagrams showing the failure diagnosis circuits of the input board and output board, respectively, and Fig. 3 is the block diagram shown in Fig. 2 (A).
Logic diagram of the state change detection circuit in (B), 4th
Figures (A) and (B) are signal waveform diagrams of various parts showing the operation of Figure 3 in a normal state and in a failure state, respectively. ■A~IC...Input board 2...Output board fault diagnosis dedicated input board 3A~3C...
・Output board 4... Output board dedicated to input board failure diagnosis 5... Fault display board 14... Status change check circuit 15... Timer 16... Indicator light agent Patent attorney Yoshiaki Inomata ( (and 1 other person) Figure 1 (A) (B) Figure 2

Claims (1)

【特許請求の範囲】[Claims] プログラマブルコントローラの入力基板または出力基板
を基板単位で故障診断するプログラマブルコントローラ
の基板故障診断回路において、一定周期のパルス信号を
発生して各入力基板の所定のビットに入力する入力基板
故障診断用出力基板と、各出力基板からの一定周期のパ
ルス信号を入力する出力基板故障診断用入力基板と、上
記各入力基板に入力されたパルス信号の状態変化を検出
する状態変化検出回路と、上記状態変化が発生したとき
故障表示する表示回路を備えたことを特徴とするプログ
ラマブルコントローラの基板故障診断回路。
An output board for input board fault diagnosis that generates a pulse signal of a constant period and inputs it to a predetermined bit of each input board in a board fault diagnosis circuit of a programmable controller that diagnoses the fault of the input board or output board of a programmable controller on a board-by-board basis. , an input board for output board failure diagnosis that inputs pulse signals of a constant period from each output board, a state change detection circuit that detects changes in the state of the pulse signals input to each of the input boards, and a state change detection circuit that detects changes in the state of the pulse signals input to each of the input boards. A circuit board fault diagnosis circuit for a programmable controller, characterized by comprising a display circuit that indicates a fault when a fault occurs.
JP60216201A 1985-10-01 1985-10-01 Substrate trouble diagnosing circuit for programmable controller Pending JPS6277655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60216201A JPS6277655A (en) 1985-10-01 1985-10-01 Substrate trouble diagnosing circuit for programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60216201A JPS6277655A (en) 1985-10-01 1985-10-01 Substrate trouble diagnosing circuit for programmable controller

Publications (1)

Publication Number Publication Date
JPS6277655A true JPS6277655A (en) 1987-04-09

Family

ID=16684857

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60216201A Pending JPS6277655A (en) 1985-10-01 1985-10-01 Substrate trouble diagnosing circuit for programmable controller

Country Status (1)

Country Link
JP (1) JPS6277655A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006175489A (en) * 2004-12-24 2006-07-06 Aisin Seiki Co Ltd Cooling medium/release agent-spraying apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928728B2 (en) * 1976-10-20 1984-07-16 株式会社日本自動車部品総合研究所 Catalytic exhaust gas purification device
JPS6048523A (en) * 1983-08-26 1985-03-16 Toshiba Corp Resetting circuit of computer system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928728B2 (en) * 1976-10-20 1984-07-16 株式会社日本自動車部品総合研究所 Catalytic exhaust gas purification device
JPS6048523A (en) * 1983-08-26 1985-03-16 Toshiba Corp Resetting circuit of computer system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006175489A (en) * 2004-12-24 2006-07-06 Aisin Seiki Co Ltd Cooling medium/release agent-spraying apparatus

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