JPH03164901A - Dual system switching device - Google Patents
Dual system switching deviceInfo
- Publication number
- JPH03164901A JPH03164901A JP1306146A JP30614689A JPH03164901A JP H03164901 A JPH03164901 A JP H03164901A JP 1306146 A JP1306146 A JP 1306146A JP 30614689 A JP30614689 A JP 30614689A JP H03164901 A JPH03164901 A JP H03164901A
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- dual system
- system switching
- dual
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000009977 dual effect Effects 0.000 title claims abstract description 53
- 238000012544 monitoring process Methods 0.000 claims abstract description 20
- 238000001514 detection method Methods 0.000 abstract description 14
- 238000012790 confirmation Methods 0.000 abstract description 3
- 238000004088 simulation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000004092 self-diagnosis Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000003745 diagnosis Methods 0.000 description 2
- 230000036541 health Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、待機冗長系を構成する２つの制御装置の二
重系切換装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dual system switching device for two control devices constituting a standby redundant system.
第２図は例えば特開昭６１−２３５９０１号公報に示さ
れた従来の二重系切換装置を示すブロック図であり、図
において、１は運用系のｍ制御装置、２はこの制御装置
１と二重化されて待機冗長系を構成する待機系の制御装
置、３は制御装置１の主要機能を司る中央処理装置（以
下、ＣＰＵという）、４は同じく制御装置２の主要機能
を司るＣＰＵ、５はＣＰＵ３に信号を入出力する入出力
装置、６は同しくＣＰＵ４に信号を入出力する入出力装
置、７はプロセス状態を計測して、その計測結果を両系
の入出力装置５および６に伝送する検出器、８は制御装
置１あるいは制御装置２のプロセス出力信号を受けて動
作する操作端、９は両系のＣＰＵ３と４との間に接続さ
れた二重系切換指令部、１０はこの二重系切換指令部９
にて制御される二重系切換動作部、１１は二重系切換指
令部９から各県のＣＰＵ３，４へ送られる二重系指令信
号、１２は各県のＣＰＵ３，４から逆に二重系切換指令
部９へ送られる故障信号、１３は二重系切換動作指令で
ある。FIG. 2 is a block diagram showing a conventional dual system switching device disclosed in, for example, Japanese Patent Application Laid-Open No. 61-235901. 3 is a central processing unit (hereinafter referred to as CPU) that controls the main functions of the control device 1; 4 is a CPU that also controls the main functions of the control device 2; An input/output device that inputs and outputs signals to the CPU 3, an input/output device 6 that also inputs and outputs signals to the CPU 4, and a 7 that measures the process state and transmits the measurement results to the input/output devices 5 and 6 of both systems. 8 is an operating terminal that operates in response to a process output signal from the control device 1 or 2; 9 is a dual system switching command unit connected between the CPUs 3 and 4 of both systems; Dual system switching command section 9
11 is a dual system switching command signal sent from the dual system switching command unit 9 to the CPUs 3 and 4 of each prefecture, and 12 is a dual system switching operation unit controlled by the CPU 3 and 4 of each prefecture. The failure signal 13 sent to the system switching command section 9 is a dual system switching operation command.
次に動作について説明する。第２図において、運用系お
よび待機系の制御装置１，２は同一の機能を持ち、両系
として対等であり、上記のように二重化されて待機冗長
系を構成している。従って、常時は制御装置１，２のい
ずれか一方が運用系となり、他方が待機系となる。運用
、待機の指示は二重系切換指令部９からの二重系指令信
号１１によってなされる。ここでは、上記のように制御
装Ｍ１を運用系、制御装置２を待機系として以下の説明
をすすめる。Next, the operation will be explained. In FIG. 2, the active system and standby system control devices 1 and 2 have the same functions, are equal as both systems, and are duplexed as described above to form a standby redundant system. Therefore, one of the control devices 1 and 2 is always the active system, and the other is the standby system. Instructions for operation and standby are given by a dual system command signal 11 from a dual system switching command section 9. Here, as mentioned above, the following explanation will be given assuming that the control device M1 is the active system and the control device 2 is the standby system.
まず、運用系のＣＰ Ｕ ３は二重系切換指令部９から
受けた二重系指令信号１１によって白系が運用系である
ことを弛り、入出力装置５によって検出器７からの信号
を受信する。ＣＰＵ３は受信した上記信号に基づく所定
の制御演算を実行し、その結果に応じて入出力装置５を
介して制御出力信号の出力を行う。このとき、二重系切
換指令部９は二重系切換動作部１０を制御装置１側へ切
り換える指示を出しており、入出力装置５からの制御出
力信号が、この二重系切換動作部１０を介して３−
操作端８へ伝送されることになる。ここで、万−運用系
に故障が発生した場合には、ＣＰＵ３はそれ自身が内蔵
している自己診断機能によって事故状態を検知し、二重
系切換指令部９に故障信号１２を送出する。二重系切換
指令部９は常時両系の状態を監視しており、ＣＰＵ３か
らの故障信号１２を受信すると、待機系の正常性を確認
した上で、待機系を運用系に切り換えるため、待機系に
二重系指令信号１１を発し、同時に二重系切換動作部１
０を待機系側に切り換える制御を行う。First, the CPU 3 of the active system recognizes that the white system is the active system by the dual system command signal 11 received from the dual system switching command section 9, and receives the signal from the detector 7 through the input/output device 5. do. The CPU 3 executes a predetermined control calculation based on the received signal, and outputs a control output signal via the input/output device 5 according to the result. At this time, the dual system switching command section 9 issues an instruction to switch the dual system switching operation section 10 to the control device 1 side, and the control output signal from the input/output device 5 is transmitted to the dual system switching operation section 10. 3- to the operating end 8 via. Here, if a failure occurs in the operational system, the CPU 3 detects the accident state using its own built-in self-diagnosis function, and sends a failure signal 12 to the dual system switching command unit 9. The dual system switching command unit 9 constantly monitors the status of both systems, and when it receives the failure signal 12 from the CPU 3, it switches the standby system to the active system after confirming the normality of the standby system. A dual system command signal 11 is issued to the system, and at the same time, the dual system switching operation unit 1
Performs control to switch 0 to the standby system side.
従来の二重系切換装置は以上のように構成されているの
で、たとえ運用系の制御装置１が自己診断機能によって
故障の発生を検知しても、待機系の制御装置２が故障し
ていて、かつこれを待機系における自己診断により、事
前に検出することが不可能であった場合、あるいは二重
系切換動作部１０自体に障害が発生した場合には、上記
運用系から待機系への切換動作を行うことができないな
どの課題があった。Since the conventional dual system switching device is configured as described above, even if the active system control device 1 detects the occurrence of a failure through its self-diagnosis function, the standby system control device 2 will not fail. , and if it is impossible to detect this in advance by self-diagnosis on the standby system, or if a failure occurs in the dual system switching unit 10 itself, the switching from the active system to the standby system is performed. There were problems such as the inability to perform switching operations.
４−
この発明は上記のような課題を解消するためになされた
もので、待機系の制御装置および二重系切換動作部の故
障検知を確実に実施でき、これにより信頼性の高い二重
系切換を実施することができる二重系切換装置を得るこ
とを目的とする。4- This invention was made in order to solve the above-mentioned problems, and it is possible to reliably detect failures in the standby system control device and the dual system switching operation part, thereby achieving highly reliable dual system switching. The object of the present invention is to obtain a dual system switching device capable of performing switching.
この発明に係る二重系切換装置は、運用系および待機系
の各制御装置がそれぞれ出力する制御出力信号および出
力監視信号を監視手段によって監視し、これらの各信号
を上記各制御装置が有する内蔵診断プログラムと比較す
ることにより、上記各制御装置および二重系切換動作部
の診断を行えるようにしたものである。The dual system switching device according to the present invention monitors control output signals and output monitoring signals outputted by each of the active system and standby system control devices using a monitoring means, and monitors each of these signals by using a built-in switch that each of the above control devices has. By comparing with the diagnostic program, each of the above-mentioned control devices and the dual system switching operation section can be diagnosed.
この発明における二重系切換装置は、運用系の制御出力
信号と待機系の出力監視信号とを、それぞれ各県のＣＰ
Ｕにフィードバックし、常時、運用系および待機系の制
御装置の各状態を監視すると同時に、二重系切換動作部
の健全性確認を実現する。The dual system switching device in this invention transmits the control output signal of the active system and the output monitoring signal of the standby system to the CP of each prefecture.
Feedback is sent to U, constantly monitoring the status of the active and standby control devices, and at the same time confirming the health of the dual system switching unit.
以下、この発明の一実施例を図について説明する。第１
図において、１は運用系の制御装置、２はこの制御装置
１と二重化されて待機冗長系を形成する待機系の制御装
置、３は制御装置１の主要機能を司る中央処理装置（以
下、ＣＰＵという）、４は同じく制御装置２の主要機能
を司るＣＰＵ、５はＣＰＵ３に信号を入出力する入出力
装置、６は同じ＜ＣＰＵ４に信号を入出力する入出力装
置、７はプロセス状態を計測して、そのＨ１測結果を両
系の入出力装置５および６に伝送する検出器、８は制御
装置１あるいは制御装置２のプロセス出力信号を受けて
動作する操作端、９は同系のＣＰＵ３と４との間に接続
された二重系切換指令部、１０はこの二重系切換指令部
９にて制御される二重系切換動作部、１１は二重系切換
指令部９から各県のＣＰＵ３，４へ送られる二重系指令
信号、１２は各県のＣＰＵ３，４から逆に二重系切換指
令部９へ送られる故障信号、１３は二重系切換動作指令
である。また、１４は制御出力信号の切換動作とは別に
設けた出力監視用切換動作部、１５は模擬負荷、１６．
１８は制御出力検出抵抗、１７゜１９は待機系としての
監視出力検出抵抗である。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, 1 is an active system control device, 2 is a standby system control device that is duplicated with this control device 1 to form a standby redundant system, and 3 is a central processing unit (hereinafter referred to as CPU) that controls the main functions of the control device 1. ), 4 is a CPU that also controls the main functions of the control device 2, 5 is an input/output device that inputs and outputs signals to the CPU 3, 6 is an input/output device that inputs and outputs signals to the CPU 4, and 7 measures the process status. and a detector that transmits the H1 measurement results to the input/output devices 5 and 6 of both systems; 8 is an operating end that operates upon receiving a process output signal from the control device 1 or 2; and 9 is a CPU 3 of the same system. 4, a dual system switching command unit 10 is a dual system switching operation unit controlled by this dual system switching command unit 9, and 11 is a dual system switching command unit 9 connected to each prefecture. A dual system command signal 12 is sent to the CPUs 3 and 4, a failure signal 12 is sent from the CPUs 3 and 4 of each prefecture to the dual system switching command section 9, and 13 is a dual system switching operation command. Further, 14 is a switching operation section for output monitoring provided separately from the switching operation of the control output signal, 15 is a simulated load, and 16.
Reference numeral 18 indicates a control output detection resistor, and reference numerals 17 and 19 indicate a monitoring output detection resistor as a standby system.
また、これらの検出抵抗１６〜］９は制御出力信号およ
び出力監視信号の監視手段となる。Further, these detection resistors 16 to 9 serve as monitoring means for the control output signal and the output monitoring signal.
次に動作について説明する。入出力装置５あるいは６は
、プロセスである操作端８への出力信号として、例えば
、操作端８の開度Ｏ〜１００％に対応して４〜２０ｍＡ
の電流信号を発生している。Next, the operation will be explained. The input/output device 5 or 6 outputs, for example, 4 to 20 mA as an output signal to the operating end 8 which is a process, corresponding to the opening degree of O to 100% of the operating end 8.
A current signal is generated.
運用系の入出力装置５から出力された電流信号である制
御出力信号は、二重系切換動作部］−〇を通って操作端
へ出力される。一方、このとき、待機系の制御出力信・
号は出力監視用切換動作部１４を通って、模擬負荷１５
へ出力される。また、かかる操作端８への制御出力信号
および模擬負荷１５への待１幾信号出力である出力監視
信号は、それぞれ上記各検出抵抗１６．１９により電圧
に変換され、運用系および待機系の入出力装置５，６を
経由して、ＣＰＵ３，４に入力される。なお、このとき
、運用系と待機系の各ＣＰＵ３，４は基本的に同し演算
処理を実行している。運用および待機系のＣＰＵ３，４
では、自系の内蔵自己診断プログラムとしての出力デー
タに相当する信号が実際に出力されていることを、自系
出力データと検出抵抗１６および１９からのフィードバ
ック信号とを比較することにより確認する。従って、Ｃ
ＰＵ３、入出力装置５および二重系切換動作部１０に異
常がない状態では、制御信号の検出抵抗１６からのフィ
ードバック信号はＣＰＵ３からの出力データと一致して
いる。一方、このとき、検出抵抗１７のフィードバック
信号は零であり、ＣＰＵ３からの出力テークと不一致で
ある。待機系もまた同様に、ＣＰＵ４からの出力データ
と実際に出力される信号のフィードバック電圧監視を検
出抵抗１９を用いて行っている。また、各ＣＰＵ３，４
では上記のような制御出力信号や出力監視信号の読み返
しによる入出力診断以外にも、ウオッチングタイマや自
己診断プログラムによる健全性の確認の診断を実施して
いる。この自己診断は、例えば３００ ｍ ｓ ｅ ｃ
のサンプリングタイムに同期して定周期で実行している
。通常故障がない状態では、運用系、待機系ともに自己
診断結果は正常であり、故障信号１２はＣＰＵ３，４の
いずれからも発信されない。さらに、ＣＰＵ３，４では
上記定周期での自己診断以外に、内蔵タイマ（図示しな
い）により月１回の割合で二重糸切換部診断プログラム
を実行する。すなわち、このプログラムは故障信号１２
を模擬的に発生するものであり、運用系のＣＰＵ３が発
する。これにより運用系は待機系へ切り換ねる。勿論、
待機系に故障が発生しており、ＣＰＵ４から故障信号１
２が先に出力されている状態では、ＣＰＵ３からの故障
信号１２は受けつけられず、系切換は行わない。このと
きは、ＣＰＵ３へ運用系の動作指令が継続されることに
より、このＣＰＵ３は運用制御を続ける。The control output signal, which is a current signal output from the input/output device 5 of the active system, is output to the operating end through the dual system switching operation section ]-0. On the other hand, at this time, the control output signal of the standby system
The signal passes through the output monitoring switching unit 14 and is connected to the simulated load 15.
Output to. Further, the control output signal to the operating terminal 8 and the output monitoring signal, which is the standby signal output to the simulated load 15, are converted into voltages by the respective detection resistors 16 and 19, and are input to the active system and the standby system. The data is input to the CPUs 3 and 4 via the output devices 5 and 6. Note that, at this time, the CPUs 3 and 4 of the active system and the standby system are basically executing the same arithmetic processing. Operating and standby CPUs 3 and 4
Now, it is confirmed by comparing the output data of the own system and the feedback signals from the detection resistors 16 and 19 that the signal corresponding to the output data as the built-in self-diagnosis program of the own system is actually output. Therefore, C
When there is no abnormality in the PU 3, the input/output device 5, and the dual system switching unit 10, the feedback signal from the control signal detection resistor 16 matches the output data from the CPU 3. On the other hand, at this time, the feedback signal of the detection resistor 17 is zero, which is inconsistent with the output take from the CPU 3. Similarly, the standby system uses a detection resistor 19 to monitor feedback voltages of output data from the CPU 4 and signals actually output. In addition, each CPU3,4
In addition to input/output diagnosis by reading back control output signals and output monitoring signals as described above, we also perform health check diagnosis using a watching timer and self-diagnosis program. This self-diagnosis is performed, for example, at 300 msec.
It is executed at regular intervals in synchronization with the sampling time of Normally, in a state where there is no failure, the self-diagnosis results of both the active system and the standby system are normal, and the failure signal 12 is not transmitted from either of the CPUs 3 and 4. Furthermore, in addition to the above-mentioned self-diagnosis at regular intervals, the CPUs 3 and 4 execute a double thread switching section diagnostic program once a month using a built-in timer (not shown). That is, this program generates the fault signal 12
This is generated in a simulated manner, and is generated by the active CPU 3. This causes the active system to switch to the standby system. Of course,
A failure has occurred in the standby system, and failure signal 1 is sent from CPU4.
2 is output first, the failure signal 12 from the CPU 3 is not accepted and system switching is not performed. At this time, the CPU 3 continues to perform operational control by continuing to issue operational commands to the CPU 3.
一方、待機系に故障がなければ、二重系切換動作部１０
と出力監視用切換動作部１４は第１図とは反対側（点線
側）に切り換わる。これにより、検出抵抗１６．１７に
流れる電流は上記の状態とは逆になり、その電圧信号が
入出力装置５により変化したことが確認される。On the other hand, if there is no failure in the standby system, the dual system switching operation section 10
Then, the output monitoring switching unit 14 is switched to the side opposite to that shown in FIG. 1 (dotted line side). As a result, the current flowing through the detection resistors 16 and 17 is reversed to the above state, and it is confirmed that the voltage signal has been changed by the input/output device 5.
以上のように定期的に切換動作を行い、出力電流が切換
ねったことを確認することにより、二重系切換動作部１
０の動作確認を行う。また、上記の切換動作とフィード
バック信号の確認は１００ｍ５ｅＱ程度で行い、この間
、操作端８は動作せず、確認後は、第１−図の様な状態
へもどることを、さらに確認している。また、出力監視
用切換動作部１４を設けているので、切換前に待機系の
確認が可能である。By periodically performing the switching operation as described above and confirming that the output current has not been switched, the dual system switching operation section 1
Check the operation of 0. Furthermore, it has been further confirmed that the above switching operation and feedback signal confirmation are performed at approximately 100 m5eQ, and that the operating end 8 does not operate during this time, and that after confirmation, the state returns to the state shown in Fig. 1. Furthermore, since the output monitoring switching unit 14 is provided, it is possible to check the standby system before switching.
なお、上記実施例ではプロセスたる操作端８への出力信
号が電流である場合を示したが、電圧信号であってもよ
い。この場合においては、検出手段として、制御信号の
検出抵抗１６．１８に代えてアンド回路を用い、このア
ンド回路の入力を上記二重系切換動作部１０の上流側の
信号と下流側の信号からとり、それらの論理積をとって
、上記検出信号とすればよく、上記実施例と同様の効果
を奏する。In the above embodiment, the output signal to the operating end 8, which is a process, is a current, but it may be a voltage signal. In this case, an AND circuit is used as the detection means in place of the control signal detection resistors 16 and 18, and the input of the AND circuit is input from the upstream signal and the downstream signal of the dual system switching unit 10. The above detection signal can be obtained by calculating the AND of these signals, and the same effect as in the above embodiment can be obtained.
１０
以上のように、この発明によれば運用系および待機系の
各制御装置がそれぞれ出力する制御出力信号および出力
監視信号を監視手段によって監視し、これらの各信号を
上記各制御装置が有する内蔵診断プログラムと比較する
ことにより、上記各制御装置および二重系切換動作部の
診断を行えるように構成したので、常時、運用系および
待機系の制御装置の各状態および二重系切換動作部の状
態監視ならびに診断を確実に行い、信頼性の高い二重系
切換を確実に実施できるものが得ら九る効果がある。10 As described above, according to the present invention, the control output signal and the output monitoring signal outputted by each of the active system and standby system control devices are monitored by the monitoring means, and these signals are monitored by the built-in The configuration is such that each of the above control devices and the dual system switching operation unit can be diagnosed by comparing it with the diagnostic program, so you can always check the status of the active and standby control units and the dual system switching operation unit. It has the advantage of being able to reliably monitor and diagnose conditions and ensure reliable dual system switching.
第１図はこの梢明の一実施例による二重系切換装置を示
すブロック図、第２図は従来の二重系切換装置を示すブ
ロック図である。
１．２は制御装置、８は操作端、１０は二重系切換動作
部、１６，１７，１８，１９は監視手段（検出抵抗）。
なお、図中、同一符号は同一、または相当部分を示す。
１１−
第
図FIG. 1 is a block diagram showing a dual system switching device according to one embodiment of Kozue Akira, and FIG. 2 is a block diagram showing a conventional dual system switching device. 1.2 is a control device, 8 is an operating end, 10 is a dual system switching operation section, and 16, 17, 18, 19 are monitoring means (detection resistors). In addition, in the figures, the same reference numerals indicate the same or equivalent parts. 11- Figure
Claims (1)
重化される待機系の制御装置と、この運用系の制御装置
からの制御出力信号および待機系の制御装置からの出力
監視信号を切り換えて、これを運用系の制御出力信号と
して操作端へ出力する二重系切換動作部とを備えた二重
系切換装置において、上記各制御装置および二重系切換
動作部の診断を行うため、上記各制御装置の内蔵自己診
断プログラムと比較される上記制御出力信号および出力
監視信号の監視手段を設けたことを特徴とする二重系切
換装置。An active system control device, a standby system control device that is duplicated together with this active system control device, a control output signal from this active system control device, and an output monitoring signal from the standby system control device, In a dual system switching device equipped with a dual system switching unit that outputs this as an operating system control output signal to the operating end, each of the above A dual system switching device characterized by comprising monitoring means for the control output signal and output monitoring signal, which are compared with a built-in self-diagnosis program of the control device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1306146A JP2557990B2 (en) | 1989-11-24 | 1989-11-24 | Dual system switching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1306146A JP2557990B2 (en) | 1989-11-24 | 1989-11-24 | Dual system switching device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03164901A true JPH03164901A (en) | 1991-07-16 |
| JP2557990B2 JP2557990B2 (en) | 1996-11-27 |
Family
ID=17953609
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1306146A Expired - Lifetime JP2557990B2 (en) | 1989-11-24 | 1989-11-24 | Dual system switching device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2557990B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990084447A (en) * | 1998-05-06 | 1999-12-06 | 이종수 | Output signal redundancy device |
| JP2006117431A (en) * | 2004-10-25 | 2006-05-11 | Fujitsu Ltd | Carrying mechanism for storage shelf, its control method and its control program |
| JP2010187503A (en) * | 2009-02-13 | 2010-08-26 | Nec Computertechno Ltd | Power supply system, and diagnostic method and program for the same |
| JP2014098949A (en) * | 2012-11-13 | 2014-05-29 | Hitachi Ltd | Control system, and duplication control method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50157779A (en) * | 1974-06-12 | 1975-12-19 | ||
| JPS60195605A (en) * | 1984-03-19 | 1985-10-04 | Toshiba Corp | Process controller |
| JPS6180303A (en) * | 1984-09-28 | 1986-04-23 | Japanese National Railways<Jnr> | Switching control system of duplex system |
-
1989
- 1989-11-24 JP JP1306146A patent/JP2557990B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50157779A (en) * | 1974-06-12 | 1975-12-19 | ||
| JPS60195605A (en) * | 1984-03-19 | 1985-10-04 | Toshiba Corp | Process controller |
| JPS6180303A (en) * | 1984-09-28 | 1986-04-23 | Japanese National Railways<Jnr> | Switching control system of duplex system |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990084447A (en) * | 1998-05-06 | 1999-12-06 | 이종수 | Output signal redundancy device |
| JP2006117431A (en) * | 2004-10-25 | 2006-05-11 | Fujitsu Ltd | Carrying mechanism for storage shelf, its control method and its control program |
| JP2010187503A (en) * | 2009-02-13 | 2010-08-26 | Nec Computertechno Ltd | Power supply system, and diagnostic method and program for the same |
| JP2014098949A (en) * | 2012-11-13 | 2014-05-29 | Hitachi Ltd | Control system, and duplication control method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2557990B2 (en) | 1996-11-27 |
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