JPS6274295U - - Google Patents

Info

Publication number
JPS6274295U
JPS6274295U JP16637985U JP16637985U JPS6274295U JP S6274295 U JPS6274295 U JP S6274295U JP 16637985 U JP16637985 U JP 16637985U JP 16637985 U JP16637985 U JP 16637985U JP S6274295 U JPS6274295 U JP S6274295U
Authority
JP
Japan
Prior art keywords
waveform data
time width
converter
signal
enabling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16637985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16637985U priority Critical patent/JPS6274295U/ja
Priority to US06/893,341 priority patent/US4783812A/en
Publication of JPS6274295U publication Critical patent/JPS6274295U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示すブロツク図
である。第2図は第1図実施例の動作を説明する
ための波形図である。第3図はこの考案の他の実
施例を示すブロツク図である。第4図はこの考案
のさらに他の実施例を示すブロツク図である。第
5図はこの考案のその他の実施例を示す要部ブロ
ツク図である。 図において、10は波形データ記憶用ROM、
12はアドレス指定回路、16a〜16fはアン
ドゲート、18は振幅データレジスタ、20はU
/Dカウンタ、26は比較器、28はカウンタ、
32はD/A変換器、34は平滑回路、36は直
流電源、38はアナログスイツチを示す。
FIG. 1 is a block diagram showing one embodiment of this invention. FIG. 2 is a waveform diagram for explaining the operation of the embodiment shown in FIG. FIG. 3 is a block diagram showing another embodiment of this invention. FIG. 4 is a block diagram showing still another embodiment of this invention. FIG. 5 is a block diagram of main parts showing another embodiment of this invention. In the figure, 10 is a ROM for storing waveform data;
12 is an addressing circuit, 16a to 16f are AND gates, 18 is an amplitude data register, and 20 is a U
/D counter, 26 is a comparator, 28 is a counter,
32 is a D/A converter, 34 is a smoothing circuit, 36 is a DC power supply, and 38 is an analog switch.

Claims (1)

【実用新案登録請求の範囲】 1 複数ビツトの波形データを出力するための波
形データ出力手段、 エンベロープ信号の或る瞬時における振幅のデ
ータを発生するための手段、 前記振幅に対応する時間幅を有する時間幅信号
を出力するための手段、 前記波形データ出力手段からの波形データをア
ナログ信号に変換するためのD/A変換器、およ
び 前記時間幅信号に応じて前記D/A変換器の出
力を有効化するための有効化手段を備える、楽音
信号発生装置。 2 前記有効化手段は前記波形データ出力手段か
らの波形データを前記時間幅信号によつてゲート
するための手段を含む、実用新案登録請求の範囲
第1項記載の楽音信号発生装置。 3 前記D/A変換器に直流電圧を与えるための
電源を含み、 前記有効化手段は前記時間幅信号によつて前記
電源をオンまたはオフするための手段を含む、実
用新案登録請求の範囲第1項記載の楽音信号発生
装置。 4 前記有効化手段は前記D/A変換器の出力を
受け、かつ前記時間幅信号によつて制御されるア
ナログスイツチを含む、実用新案登録請求の範囲
第1項記載の楽音信号発生装置。
[Claims for Utility Model Registration] 1. Waveform data output means for outputting multi-bit waveform data, means for generating amplitude data at a certain instant of an envelope signal, having a time width corresponding to the amplitude. means for outputting a time width signal; a D/A converter for converting the waveform data from the waveform data output means into an analog signal; and a D/A converter for converting the output of the D/A converter according to the time width signal. A musical tone signal generating device comprising an enabling means for enabling. 2. The musical tone signal generating device according to claim 1, wherein the enabling means includes means for gating the waveform data from the waveform data output means using the time width signal. 3. The utility model registration claim 3 includes a power supply for applying a DC voltage to the D/A converter, and the enabling means includes means for turning on or off the power supply according to the time width signal. The musical tone signal generating device according to item 1. 4. The musical tone signal generating device according to claim 1, wherein the enabling means includes an analog switch that receives the output of the D/A converter and is controlled by the time width signal.
JP16637985U 1985-08-05 1985-10-28 Pending JPS6274295U (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP16637985U JPS6274295U (en) 1985-10-28 1985-10-28
US06/893,341 US4783812A (en) 1985-08-05 1986-08-05 Electronic sound synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16637985U JPS6274295U (en) 1985-10-28 1985-10-28

Publications (1)

Publication Number Publication Date
JPS6274295U true JPS6274295U (en) 1987-05-12

Family

ID=31097294

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16637985U Pending JPS6274295U (en) 1985-08-05 1985-10-28

Country Status (1)

Country Link
JP (1) JPS6274295U (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51104333A (en) * 1975-03-11 1976-09-16 Kawai Musical Instr Mfg Co
JPS51106413A (en) * 1975-03-14 1976-09-21 Kawai Musical Instr Mfg Co Denshigatsukino enberoopufukasochi
JPS52106413A (en) * 1976-03-04 1977-09-07 Gen Time Corp Step motor
JPS5732494A (en) * 1980-08-06 1982-02-22 Casio Computer Co Ltd Envelope control system for electronic musical instrument
JPS592090A (en) * 1982-06-28 1984-01-07 シャープ株式会社 Musical piece performer
JPS6022187A (en) * 1983-07-18 1985-02-04 松下電器産業株式会社 Envelope adder

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51104333A (en) * 1975-03-11 1976-09-16 Kawai Musical Instr Mfg Co
JPS51106413A (en) * 1975-03-14 1976-09-21 Kawai Musical Instr Mfg Co Denshigatsukino enberoopufukasochi
JPS52106413A (en) * 1976-03-04 1977-09-07 Gen Time Corp Step motor
JPS5732494A (en) * 1980-08-06 1982-02-22 Casio Computer Co Ltd Envelope control system for electronic musical instrument
JPS592090A (en) * 1982-06-28 1984-01-07 シャープ株式会社 Musical piece performer
JPS6022187A (en) * 1983-07-18 1985-02-04 松下電器産業株式会社 Envelope adder

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