JPS6273551U - - Google Patents

Info

Publication number
JPS6273551U
JPS6273551U JP1985163691U JP16369185U JPS6273551U JP S6273551 U JPS6273551 U JP S6273551U JP 1985163691 U JP1985163691 U JP 1985163691U JP 16369185 U JP16369185 U JP 16369185U JP S6273551 U JPS6273551 U JP S6273551U
Authority
JP
Japan
Prior art keywords
heat sink
semiconductor package
input
output terminals
ceramic plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1985163691U
Other languages
English (en)
Other versions
JPH0333074Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985163691U priority Critical patent/JPH0333074Y2/ja
Publication of JPS6273551U publication Critical patent/JPS6273551U/ja
Application granted granted Critical
Publication of JPH0333074Y2 publication Critical patent/JPH0333074Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Description

【図面の簡単な説明】
第1図は本考案のオートシンク付半導体用パツ
ケージの一実施例を示す一部破断斜視図、第2図
は第1図のA―A断面図、第3図は第1図におけ
るヒートシンクの三面図でa,b,cはそれぞれ
正面図、下面図、側面図、第4図は従来のヒート
シンク付半導体用パツケージの一例を示す一部破
断斜視図である。 1……基板、2,2a……ヒートシンク、3…
…溝、4……搭載部、5……入出力端子、6……
接続パツド、7……パターン、8……ヒートシン
ク固着剤、9……ICチツプ、10……チツプ固
着剤、11……ワイヤ、12……キヤツプ。

Claims (1)

    【実用新案登録請求の範囲】
  1. 一方の面にチツプ搭載部、複数の入出力端子お
    よび該入出力端子とチツプとを接続する接続パツ
    ドが設けられ、他方の面にヒートシンクが接合さ
    れたセラミツク板を備えるヒートシンク付半導体
    用パツケージにおいて、前記ヒートシンクはアル
    ミニウム材からなり、前記セラミツク板の接合面
    に複数本の溝を有することを特徴とするヒートシ
    ンク付半導体用パツケージ。
JP1985163691U 1985-10-24 1985-10-24 Expired JPH0333074Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985163691U JPH0333074Y2 (ja) 1985-10-24 1985-10-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985163691U JPH0333074Y2 (ja) 1985-10-24 1985-10-24

Publications (2)

Publication Number Publication Date
JPS6273551U true JPS6273551U (ja) 1987-05-11
JPH0333074Y2 JPH0333074Y2 (ja) 1991-07-12

Family

ID=31092127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985163691U Expired JPH0333074Y2 (ja) 1985-10-24 1985-10-24

Country Status (1)

Country Link
JP (1) JPH0333074Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015126168A (ja) * 2013-12-27 2015-07-06 三菱電機株式会社 パワーモジュール

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015126168A (ja) * 2013-12-27 2015-07-06 三菱電機株式会社 パワーモジュール

Also Published As

Publication number Publication date
JPH0333074Y2 (ja) 1991-07-12

Similar Documents

Publication Publication Date Title
JPS6273551U (ja)
JPS6151737U (ja)
JPS6413145U (ja)
JPS6413144U (ja)
JPH0265349U (ja)
JPH0353853U (ja)
JPH0254234U (ja)
JPS63187330U (ja)
JPS61102050U (ja)
JPS6127337U (ja) 半導体装置用ヘツダ
JPS5842940U (ja) 混成集積回路装置
JPS6247171U (ja)
JPH01139451U (ja)
JPS58142941U (ja) Icパツケ−ジ
JPS6289158U (ja)
JPH01112044U (ja)
JPS6096895U (ja) 集積回路の放熱構造
JPH0165142U (ja)
JPS61158958U (ja)
JPS6450447U (ja)
JPH0313754U (ja)
JPH01104048U (ja)
JPS6413143U (ja)
JPH0192134U (ja)
JPS6219751U (ja)