JPS6270473U - - Google Patents

Info

Publication number
JPS6270473U
JPS6270473U JP16196885U JP16196885U JPS6270473U JP S6270473 U JPS6270473 U JP S6270473U JP 16196885 U JP16196885 U JP 16196885U JP 16196885 U JP16196885 U JP 16196885U JP S6270473 U JPS6270473 U JP S6270473U
Authority
JP
Japan
Prior art keywords
groove
insulating substrate
conductive paste
filled
wiring circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16196885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16196885U priority Critical patent/JPS6270473U/ja
Publication of JPS6270473U publication Critical patent/JPS6270473U/ja
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係るプリント回路基板の断面
拡大図の一実施例で、Aは溝部を形成した絶縁基
板、Bは溝部に導電性ペーストを充填した絶縁基
板、第2図は絶縁基板上に電気配線回路を形成し
たものの断面拡大図である。 1:絶縁基板、2,2′:配線回路用の溝、3
,3′:導電性ペースト、4,4′:配線回路の
銅箔又は導電性ペースト。
Fig. 1 is an example of an enlarged cross-sectional view of a printed circuit board according to the present invention, in which A is an insulating substrate with grooves formed, B is an insulating substrate with conductive paste filled in the grooves, and Fig. 2 is an insulating substrate. FIG. 2 is an enlarged cross-sectional view of a circuit in which an electric wiring circuit is formed. 1: Insulating substrate, 2, 2': Groove for wiring circuit, 3
, 3': conductive paste, 4, 4': copper foil or conductive paste for wiring circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板に予め所望の電気配線回路となる溝を
形成させた後、この溝に導電性ペーストを充填し
て成ることを特徴とするプリント回路基板。
1. A printed circuit board characterized in that a groove forming a desired electrical wiring circuit is formed in an insulating substrate in advance, and then the groove is filled with a conductive paste.
JP16196885U 1985-10-22 1985-10-22 Pending JPS6270473U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16196885U JPS6270473U (en) 1985-10-22 1985-10-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16196885U JPS6270473U (en) 1985-10-22 1985-10-22

Publications (1)

Publication Number Publication Date
JPS6270473U true JPS6270473U (en) 1987-05-02

Family

ID=31088782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16196885U Pending JPS6270473U (en) 1985-10-22 1985-10-22

Country Status (1)

Country Link
JP (1) JPS6270473U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316611A (en) * 1996-06-20 1996-11-29 Rohm Co Ltd Circuit board
WO2010071426A1 (en) 2008-12-17 2010-06-24 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Flexible electronic product and method for manufacturing the same
US10078408B2 (en) 2008-02-28 2018-09-18 3M Innovative Properties Company Touch screen sensor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141786A (en) * 1979-04-20 1980-11-05 Hitachi Ltd Method of forming infinitesimal pattern
JPS566497A (en) * 1979-06-27 1981-01-23 Sumitomo Electric Industries Method of manufacturing integrated circuit
JPS60115290A (en) * 1983-11-28 1985-06-21 富士ゼロックス株式会社 Patterning method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141786A (en) * 1979-04-20 1980-11-05 Hitachi Ltd Method of forming infinitesimal pattern
JPS566497A (en) * 1979-06-27 1981-01-23 Sumitomo Electric Industries Method of manufacturing integrated circuit
JPS60115290A (en) * 1983-11-28 1985-06-21 富士ゼロックス株式会社 Patterning method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316611A (en) * 1996-06-20 1996-11-29 Rohm Co Ltd Circuit board
US10078408B2 (en) 2008-02-28 2018-09-18 3M Innovative Properties Company Touch screen sensor
US10101868B1 (en) 2008-02-28 2018-10-16 3M Innovative Properties Company Touch screen sensor
WO2010071426A1 (en) 2008-12-17 2010-06-24 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Flexible electronic product and method for manufacturing the same

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