JPS6266356U - - Google Patents
Info
- Publication number
- JPS6266356U JPS6266356U JP15809085U JP15809085U JPS6266356U JP S6266356 U JPS6266356 U JP S6266356U JP 15809085 U JP15809085 U JP 15809085U JP 15809085 U JP15809085 U JP 15809085U JP S6266356 U JPS6266356 U JP S6266356U
- Authority
- JP
- Japan
- Prior art keywords
- program
- execution
- busy flag
- processors
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Advance Control (AREA)
- Multi Processors (AREA)
Description
図は本考案の一実施例を示すもので、並列処理
装置の構成を示すブロツク図である。
1……並列処理装置、2……プログラムシーケ
ンサ(P・S)、3……プログラムプロセツサ(
P・P)、5……メモリ、10……ビジーフラグ
。
The figure shows one embodiment of the present invention, and is a block diagram showing the configuration of a parallel processing device. 1...Parallel processing device, 2...Program sequencer (P/S), 3...Program processor (
P/P), 5...Memory, 10...Busy flag.
Claims (1)
ちか実行中であるというビジーフラグを有するメ
モリ、レジスタと、 命令を実行し実行中のデータについてビジーフ
ラグをたてて命令の実行終了後はビジーフラグを
をおろす複数個のプログラムプロセツサと、 プログラムの先頭から順々に命令を複数個のプ
ログラムプロセツサのいずれかに転送するプログ
ラムシーケンサとを有し、 ビジーフラグがたつているデータを用いる命令
についてビジーフラグがおりるまでプログラムプ
ロセツサの実行動作を待機させることを特徴とす
る並列処理装置。[Claims for Utility Model Registration] Memory and registers that have a busy flag for each data indicating that the data is currently waiting for calculation execution or are being executed; It has multiple program processors that lower the busy flag after execution is completed, and a program sequencer that sequentially transfers instructions from the beginning of the program to one of the multiple program processors. 1. A parallel processing device that causes a program processor to wait for execution of an instruction using a program processor until a busy flag is cleared.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15809085U JPS6266356U (en) | 1985-10-16 | 1985-10-16 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15809085U JPS6266356U (en) | 1985-10-16 | 1985-10-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6266356U true JPS6266356U (en) | 1987-04-24 |
Family
ID=31081249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15809085U Pending JPS6266356U (en) | 1985-10-16 | 1985-10-16 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6266356U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5110746A (en) * | 1974-07-17 | 1976-01-28 | Hitachi Ltd | |
JPS6091474A (en) * | 1983-10-24 | 1985-05-22 | Fujitsu Ltd | Exclusive control system for plural processors |
JPS60201442A (en) * | 1984-03-26 | 1985-10-11 | Nec Corp | Data processing device |
-
1985
- 1985-10-16 JP JP15809085U patent/JPS6266356U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5110746A (en) * | 1974-07-17 | 1976-01-28 | Hitachi Ltd | |
JPS6091474A (en) * | 1983-10-24 | 1985-05-22 | Fujitsu Ltd | Exclusive control system for plural processors |
JPS60201442A (en) * | 1984-03-26 | 1985-10-11 | Nec Corp | Data processing device |
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