JPS61192351U - - Google Patents
Info
- Publication number
- JPS61192351U JPS61192351U JP7706885U JP7706885U JPS61192351U JP S61192351 U JPS61192351 U JP S61192351U JP 7706885 U JP7706885 U JP 7706885U JP 7706885 U JP7706885 U JP 7706885U JP S61192351 U JPS61192351 U JP S61192351U
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- rom
- fetching
- address
- stage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Executing Machine-Instructions (AREA)
Description
第１図はこの考案の一実施例の回路構成を示す
ブロツク図である。
１１……データバス、１２……インストラクシ
ヨンレジスタ（ＩＲ）、１３……第１のオペラン
ドレジスタ（ＯＰＮＤ１）、１４……第２のオペ
ランドレジスタ（ＯＰＮＤ２）、１５……インス
トラクシヨンデコーダ、１６……フエツチ制御回
路、１７……デコーダ、１８……データセレクタ
、１９……演算回路、２０……エンコーダ、２１
……プログラムカウンタ。
FIG. 1 is a block diagram showing the circuit configuration of an embodiment of this invention. 11...Data bus, 12...Instruction register (IR), 13...First operand register (OPND1), 14...Second operand register (OPND2), 15...Instruction decoder, 16 ... Fetch control circuit, 17 ... Decoder, 18 ... Data selector, 19 ... Arithmetic circuit, 20 ... Encoder, 21
...Program counter.
Claims (1)
し段階と、この命令取出し段階で取出された命令
を実行する命令実行段階を有するＣＰＵにおいて
、アドレスのビツト数に満たないビツト数のデー
タから上記アドレスの指定データをエンコードす
るＲＯＭを備え、このＲＯＭの指定アドレスデー
タによりサブルーチンの読出し命令を実行するこ
とを特徴とするサブルーチン読出し制御回路。 In a CPU that has an instruction fetching stage for fetching an instruction from a program ROM and an instruction execution stage for executing the instruction fetched at this instruction fetching stage, the specified data of the above address is extracted from data whose number of bits is less than the number of bits of the address. 1. A subroutine read control circuit comprising a ROM for encoding and executing a subroutine read command based on designated address data of the ROM.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7706885U JPS61192351U (en) | 1985-05-23 | 1985-05-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7706885U JPS61192351U (en) | 1985-05-23 | 1985-05-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61192351U true JPS61192351U (en) | 1986-11-29 |
Family
ID=30619793
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7706885U Pending JPS61192351U (en) | 1985-05-23 | 1985-05-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61192351U (en) |
-
1985
- 1985-05-23 JP JP7706885U patent/JPS61192351U/ja active Pending
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