JPS6257052A - ト−ラス結合型モジユ−ル配列実装方式 - Google Patents
ト−ラス結合型モジユ−ル配列実装方式Info
- Publication number
- JPS6257052A JPS6257052A JP60196024A JP19602485A JPS6257052A JP S6257052 A JPS6257052 A JP S6257052A JP 60196024 A JP60196024 A JP 60196024A JP 19602485 A JP19602485 A JP 19602485A JP S6257052 A JPS6257052 A JP S6257052A
- Authority
- JP
- Japan
- Prior art keywords
- module
- row
- terminal
- odd
- numbered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010168 coupling process Methods 0.000 title description 8
- 230000008878 coupling Effects 0.000 title description 7
- 238000005859 coupling reaction Methods 0.000 title description 7
- 238000000034 method Methods 0.000 claims description 15
- 239000011159 matrix material Substances 0.000 claims 1
- 230000006866 deterioration Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 10
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Multi Processors (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60196024A JPS6257052A (ja) | 1985-09-06 | 1985-09-06 | ト−ラス結合型モジユ−ル配列実装方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60196024A JPS6257052A (ja) | 1985-09-06 | 1985-09-06 | ト−ラス結合型モジユ−ル配列実装方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6257052A true JPS6257052A (ja) | 1987-03-12 |
| JPH0241779B2 JPH0241779B2 (enrdf_load_stackoverflow) | 1990-09-19 |
Family
ID=16350949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60196024A Granted JPS6257052A (ja) | 1985-09-06 | 1985-09-06 | ト−ラス結合型モジユ−ル配列実装方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6257052A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0511887A (ja) * | 1990-12-31 | 1993-01-22 | American Teleph & Telegr Co <Att> | マルチプロセツサボードスタツク及びそのモジユール配置方法 |
-
1985
- 1985-09-06 JP JP60196024A patent/JPS6257052A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0511887A (ja) * | 1990-12-31 | 1993-01-22 | American Teleph & Telegr Co <Att> | マルチプロセツサボードスタツク及びそのモジユール配置方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0241779B2 (enrdf_load_stackoverflow) | 1990-09-19 |
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