JPS6251864U - - Google Patents
Info
- Publication number
- JPS6251864U JPS6251864U JP14281085U JP14281085U JPS6251864U JP S6251864 U JPS6251864 U JP S6251864U JP 14281085 U JP14281085 U JP 14281085U JP 14281085 U JP14281085 U JP 14281085U JP S6251864 U JPS6251864 U JP S6251864U
- Authority
- JP
- Japan
- Prior art keywords
- counter
- pulse
- synchronizing signal
- decoder
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は本考案の同期信号発生回路の回路構成
図、第２図は第１図の回路におけるタイミングチ
ヤート、第３図は従来の同期信号発生回路の回路
構成図である。
１１…カウンタ、１２…デコーダ、１３…切換
スイツチ回路、１４…アンドゲート。
FIG. 1 is a circuit diagram of a synchronizing signal generating circuit according to the present invention, FIG. 2 is a timing chart of the circuit of FIG. 1, and FIG. 3 is a circuit diagram of a conventional synchronizing signal generating circuit. 11... Counter, 12... Decoder, 13... Changeover switch circuit, 14... AND gate.
Claims (1)
するカウンタと、 このカウンタ出力を分周して垂直同期信号に対
応した同期パルスを出力すると共にそのパルスで
前記カウンタをリセツトさせるデコーダと、 前記カウンタの計数出力値１の第１端子及び計
数出力値２の第２端子と前記デコーダ間に設けら
れる切換スイツチ回路と、 外部同期信号と前記カウンタからのリセツトパ
ルスとの位相の一致、不一致を検出し、その検出
信号で前記切換スイツチ回路の切換制御を行うた
めの手段とを具備したことを特徴とする同期信号
発生回路。[Claims for Utility Model Registration] A counter that counts clock pulses corresponding to a horizontal synchronizing signal, and a decoder that divides the output of this counter, outputs a synchronizing pulse corresponding to a vertical synchronizing signal, and uses the pulse to reset the counter. a changeover switch circuit provided between a first terminal of the count output value 1 and a second terminal of the count output value 2 of the counter and the decoder; and a phase match between an external synchronization signal and a reset pulse from the counter; 1. A synchronizing signal generating circuit comprising means for detecting a mismatch and controlling switching of the changeover switch circuit using the detection signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14281085U JPS6251864U (en) | 1985-09-20 | 1985-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14281085U JPS6251864U (en) | 1985-09-20 | 1985-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6251864U true JPS6251864U (en) | 1987-03-31 |
Family
ID=31051891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14281085U Pending JPS6251864U (en) | 1985-09-20 | 1985-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6251864U (en) |
-
1985
- 1985-09-20 JP JP14281085U patent/JPS6251864U/ja active Pending