JPS6312976U - - Google Patents
Info
- Publication number
- JPS6312976U JPS6312976U JP1986093747U JP9374786U JPS6312976U JP S6312976 U JPS6312976 U JP S6312976U JP 1986093747 U JP1986093747 U JP 1986093747U JP 9374786 U JP9374786 U JP 9374786U JP S6312976 U JPS6312976 U JP S6312976U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- synchronization signal
- vertical
- signal
- vertical synchronization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000926 separation method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Synchronizing For Television (AREA)
Description
第1図は、本考案の一実施例を示す回路図、及
び第2図は従来の垂直駆動パルス発生回路を示す
回路図である。
9……同期分離回路、11……垂直カウントダ
ウン回路、13……入力選択回路、14……リセ
ツトパルス発生回路、18……信号選択回路、1
9……位相比較回路、20……微分回路、21…
…端子、22……16進カウンタ、24……8進
カウンタ、26……SR―FF、27……オアゲ
ート。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional vertical drive pulse generation circuit. 9...Synchronization separation circuit, 11...Vertical countdown circuit, 13...Input selection circuit, 14...Reset pulse generation circuit, 18...Signal selection circuit, 1
9...Phase comparison circuit, 20 ...Differentiating circuit, 21...
...terminal, 22...hexadecimal counter, 24...octal counter, 26...SR-FF, 27...OR gate.
Claims (1)
印加され、該クロツク信号を分周して疑似垂直同
期信号を発生する垂直カウントダウン回路と、映
像信号中の垂直同期信号を同期分離する同期分離
回路と、前記疑似垂直同期信号及び前記垂直同期
信号が印加され、どちらかを選択出力する選択回
路と、該選択回路の出力信号に応じて前記垂直カ
ウントダウン回路をリセツトさせるリセツトパル
ス発生回路と、チヤンネル切換信号に応じて前記
選択回路を切換える切換回路とから成り、前記垂
直カウントダウン回路が前記疑似垂直同期信号に
よつてリセツトされている状態で、チヤンネル切
換えが行なわれた場合、前記切換回路によつて前
記選択回路が前記垂直同期信号を選択出力する様
にさせたことを特徴とする垂直駆動パルス発生回
路。 a vertical countdown circuit to which a clock signal with a frequency N times that of the horizontal synchronization signal is applied and frequency-divides the clock signal to generate a pseudo vertical synchronization signal; and a synchronization separation circuit to synchronously separate the vertical synchronization signal in the video signal. , a selection circuit to which the pseudo vertical synchronization signal and the vertical synchronization signal are applied and selectively outputs one of them; a reset pulse generation circuit that resets the vertical countdown circuit in accordance with the output signal of the selection circuit; and a channel switching signal. a switching circuit that switches the selection circuit according to the switching circuit, and when channel switching is performed while the vertical countdown circuit has been reset by the pseudo vertical synchronization signal, the switching circuit switches the selection circuit. A vertical drive pulse generation circuit characterized in that the circuit selectively outputs the vertical synchronization signal.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9374786U JPH0510456Y2 (en) | 1986-06-19 | 1986-06-19 | |
KR1019870006170A KR930005183B1 (en) | 1986-06-19 | 1987-06-18 | Vertical driving pulse generating circuit |
US07/063,949 US4845563A (en) | 1986-06-19 | 1987-06-19 | Vertical driving pulse generating circuit |
EP87108804A EP0249987B1 (en) | 1986-06-19 | 1987-06-19 | Vertical driving pulse generating circuit |
DE87108804T DE3787126T2 (en) | 1986-06-19 | 1987-06-19 | Circuit for generating vertical driver pulses. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9374786U JPH0510456Y2 (en) | 1986-06-19 | 1986-06-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6312976U true JPS6312976U (en) | 1988-01-28 |
JPH0510456Y2 JPH0510456Y2 (en) | 1993-03-15 |
Family
ID=30956583
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9374786U Expired - Lifetime JPH0510456Y2 (en) | 1986-06-19 | 1986-06-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0510456Y2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006060483A (en) * | 2004-08-19 | 2006-03-02 | Sharp Corp | Vertical synchronizing circuit and television receiver equipped therewith |
-
1986
- 1986-06-19 JP JP9374786U patent/JPH0510456Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0510456Y2 (en) | 1993-03-15 |
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