JPS6249275U - - Google Patents

Info

Publication number
JPS6249275U
JPS6249275U JP14013785U JP14013785U JPS6249275U JP S6249275 U JPS6249275 U JP S6249275U JP 14013785 U JP14013785 U JP 14013785U JP 14013785 U JP14013785 U JP 14013785U JP S6249275 U JPS6249275 U JP S6249275U
Authority
JP
Japan
Prior art keywords
layer
printed wiring
dielectric constant
multilayer printed
inner layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14013785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14013785U priority Critical patent/JPS6249275U/ja
Publication of JPS6249275U publication Critical patent/JPS6249275U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の多層印刷配線板を示す縦断面
図である。 1,4……ガラス―エポキシ樹脂の積層板、2
,3……信号パターン、5,6……地気層、7…
…(ガラス―エポキシ樹脂の)プリプレグ層、8
……ガラス―四フツ化エチレン樹脂の積層板、9
……スルホール。
FIG. 1 is a longitudinal sectional view showing a multilayer printed wiring board of the present invention. 1, 4...Glass-epoxy resin laminate, 2
, 3...Signal pattern, 5, 6...Geological layer, 7...
... (glass-epoxy resin) prepreg layer, 8
...Glass-tetrafluoroethylene resin laminate, 9
... Thruhole.

Claims (1)

【実用新案登録請求の範囲】 (1) 絶縁基板内に内層信号パターンと層内地気
層とを対向配設する内層導体層を有し、かつ絶縁
基板表裏面を導通するスルホールを有する多層印
刷配線板において、前記内層信号パターンと内層
磁気層との間の絶縁層内に誘電率2.0〜3.0
の低誘電率の基材層をスルホール壁と離間させて
配置したことを特徴とする多層印刷配線板。 (2) 前記低誘電率の基材層としてガラス―四フ
ツ化エチレン樹脂積層板を用いることを特徴とす
る実用新案登録請求の範囲第1項記載の多層印刷
配線板。
[Scope of Claim for Utility Model Registration] (1) Multilayer printed wiring having an inner conductor layer in which an inner layer signal pattern and an inner layer ground layer are disposed facing each other in an insulating substrate, and a through hole that conducts between the front and back surfaces of the insulating substrate. In the plate, the insulating layer between the inner layer signal pattern and the inner layer magnetic layer has a dielectric constant of 2.0 to 3.0.
A multilayer printed wiring board characterized in that a base material layer having a low dielectric constant is arranged at a distance from a through-hole wall. (2) The multilayer printed wiring board according to claim 1, wherein a glass-tetrafluoroethylene resin laminate is used as the low dielectric constant base material layer.
JP14013785U 1985-09-12 1985-09-12 Pending JPS6249275U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14013785U JPS6249275U (en) 1985-09-12 1985-09-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14013785U JPS6249275U (en) 1985-09-12 1985-09-12

Publications (1)

Publication Number Publication Date
JPS6249275U true JPS6249275U (en) 1987-03-26

Family

ID=31046702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14013785U Pending JPS6249275U (en) 1985-09-12 1985-09-12

Country Status (1)

Country Link
JP (1) JPS6249275U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6249277U (en) * 1985-09-13 1987-03-26
JPS6265879U (en) * 1985-10-16 1987-04-23
JP2007165755A (en) * 2005-12-16 2007-06-28 Matsushita Electric Ind Co Ltd Wiring board and method for manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6249277U (en) * 1985-09-13 1987-03-26
JPS6265879U (en) * 1985-10-16 1987-04-23
JP2007165755A (en) * 2005-12-16 2007-06-28 Matsushita Electric Ind Co Ltd Wiring board and method for manufacturing the same

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