JPS624859B2 - - Google Patents
Info
- Publication number
- JPS624859B2 JPS624859B2 JP56170782A JP17078281A JPS624859B2 JP S624859 B2 JPS624859 B2 JP S624859B2 JP 56170782 A JP56170782 A JP 56170782A JP 17078281 A JP17078281 A JP 17078281A JP S624859 B2 JPS624859 B2 JP S624859B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- heat sink
- recess
- heat
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56170782A JPS5873141A (ja) | 1981-10-27 | 1981-10-27 | マルチチツプlsiパツケ−ジ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56170782A JPS5873141A (ja) | 1981-10-27 | 1981-10-27 | マルチチツプlsiパツケ−ジ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5873141A JPS5873141A (ja) | 1983-05-02 |
| JPS624859B2 true JPS624859B2 (https=) | 1987-02-02 |
Family
ID=15911267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56170782A Granted JPS5873141A (ja) | 1981-10-27 | 1981-10-27 | マルチチツプlsiパツケ−ジ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5873141A (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62116440U (https=) * | 1986-01-14 | 1987-07-24 |
-
1981
- 1981-10-27 JP JP56170782A patent/JPS5873141A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5873141A (ja) | 1983-05-02 |
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