JPS6248041A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To increase the radiation resistance and to improve the integration of a semiconductor integrated circuit device by providing an element separating region of an oxide film formed on a silicon substrate and a polycrystalline silicon film containing a p-type impurity formed on the oxide film. CONSTITUTION:To electrically separate n-type impurity diffused layers 2, 2A formed on a p-type silicon substrate 1, a polycrystalline silicon film 5 added with 10<20>/cm<3> of boron B is formed 3,000Angstrom thick on a silicon oxide film 4 of 1,000Angstrom thick. Since elements of n-channel are separated by the polycrystalline silicon film added with the p-type impurity, the radiation resistance can be remarkably improved. Further, the polycrystalline silicon and the substrate are wired directly to omit additional wirings, thereby obtaining a semiconductor integrated circuit having high integration.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device having an MO8 type transistor.

[Conventional technology]

Conventionally, selective oxidation has been widely used as an element isolation method for MO8 type transistors (hereinafter referred to as MO8T).

[Problem that the invention seeks to solve]

In the selective oxidation method described above, a thick field oxide film is used for element isolation, but this method has a problem in that MO8T has a low resistance to radiation.

In contrast, attempts have been made to improve the radiation resistance tk of the device by using a non-doped or n-type impurity-doped polycrystalline silicon film between silicon oxide films as a shielding material between elements. being done. However, this method has drawbacks such as a significant reduction in the integration density of elements and an inability to obtain sufficient element isolation breakdown voltage because contact areas and the like are not provided separately.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device with a high radiation tolerance and an improved degree of integration.

[Failure to solve the problem]

A semiconductor integrated circuit device according to a first aspect of the present invention includes an element isolation region comprising a silicon substrate, an oxide film provided on the silicon substrate, and a polycrystalline silicon film containing p-type impurities provided on the oxide film. It has the following.

A semiconductor integrated circuit device according to the second aspect of the present invention includes an element isolation region consisting of an oxide film provided on a silicon substrate and a polycrystalline silicon layer including a p-type impurity provided on the oxide film; It has a high-concentration p-type nonconformity region provided in a self-aligned manner in the separated class @F.

A semiconductor integrated circuit device according to a third aspect of the present invention includes a silicon substrate, an oxide film provided on the silicon substrate and having an opening, and a polycrystalline silicon film provided on the oxide film that reads p-type impurities. It has an element isolation region.

〔Example〕 Embodiments of the present invention will be briefly described with reference to the drawings.

FIG. 1 is a sectional view of an embodiment of the first invention.

n-type impurity diffusion layer 2 formed on p-type silicon substrate 1
In order to electrically isolate the two people, boron (B) is provided at an angle of 102 degrees on a silicon oxide film 4 having a thickness of 1000 Å.

FIG. 2 is a sectional view of an embodiment of the second invention.

In this example, polycrystalline silicon @ 5 doped with boron as a p-type impurity covering an inactive region is provided on a silicon oxide pattern 4 having a thickness of 100 OA formed on a p-type silicon substrate 1. It is being Using this polycrystalline silicon film 5 as a diffusion source, heat treatment (for example, 850
C), a p-type impurity diffusion layer 3 is formed at -F of the polycrystalline silicon film 5 through the entire silicon oxide film 4 in a self-aligned manner. This p-type impurity diffusion layer 3 is highly effective in improving field reversal voltage and reducing leakage current.

FIG. 3 is a sectional view of an embodiment of the third invention.

In this embodiment, an opening 7 is provided in the silicon oxide film 4 having a thickness of 100 OA, and the p-type impurity diffusion layer 3 using the p-type polycrystalline silicon film 5 as a diffusion source is formed through the opening 7. This is provided to ensure ohmic connection.

In this example, the potential of the polycrystalline silicon film 5 as a shielding material can be fixed without using aluminum wiring or the like, so that the degree of integration can be greatly improved.

〔Effect of the invention〕

As described above, in the semiconductor integrated circuit device according to the present invention, since the n-channel portion is separated by the polycrystalline silicon compound doped with a p-type contingency, a significant improvement in radiation resistance can be realized.

Further, by using a polycrystalline silicon film as a diffusion source and providing a p-type impurity diffusion layer through a cross-section, a highly reliable semiconductor integrated circuit device having characteristics such as sufficiently high field reversal voltage and low leakage current can be realized.

Furthermore, by directly connecting the polycrystalline silicon and the substrate, additional wiring can be omitted and a semiconductor integrated circuit with a high degree of integration can be realized.

[Brief explanation of drawings]

1 to 3 are cross-sectional views of embodiments of the first to third inventions. 1...p-type silicon substrate, 2,2A...
-n type impurity diffusion layer, 3...p+ type impurity diffusion layer, 4... silicon oxide film, 5... polycrystalline silicon film, 6... Silicon oxide film, 7.
·····Aperture. -1, □ Hisashi □, □ 4

Claims (3)

[Claims] (1) A semiconductor characterized by having a silicon substrate, an element isolation region consisting of an oxide film provided on the silicon substrate, and a polycrystalline silicon film containing p-type impurities provided on the oxide film. Integrated circuit device. (2) An element isolation region consisting of an oxide film provided on a silicon substrate and a polycrystalline silicon film containing p-type impurities provided on the oxide film, and an element isolation region provided under the element isolation region in a self-aligned manner. 1. A semiconductor integrated circuit device comprising: a high concentration p-type impurity region; (3) A device isolation region comprising a silicon substrate, an oxide film provided on the silicon substrate and having an opening, and a polycrystalline silicon film containing p-type impurities provided on the oxide film. Semiconductor integrated circuit device.