Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIDO KEISOKU GIJUTSU KENKYUKUMIAI
Original Assignee
JIDO KEISOKU GIJUTSU KENKYUKUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIDO KEISOKU GIJUTSU KENKYUKUMIAIfiledCriticalJIDO KEISOKU GIJUTSU KENKYUKUMIAI
Priority to JP57162729ApriorityCriticalpatent/JPS5951543A/ja
Publication of JPS5951543ApublicationCriticalpatent/JPS5951543A/ja
Publication of JPS6244416B2publicationCriticalpatent/JPS6244416B2/ja
H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
H10W10/01—Manufacture or treatment
H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
H—ELECTRICITY
H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
H10W10/10—Isolation regions comprising dielectric materials