JPS6242442A - Dynamic ram semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To establish reliable isolation between cells and to enlarge capacitor regions and thereby to realize enlarged capacity by a method wherein isolating regions are defined by grooves of two different widths for the formation of cells on a semiconductor substrate and a capacitor section is formed to extend along the sidewalls of an isolating region containing the wider groove. CONSTITUTION:A capacitor section on a semiconductor substrate 1 consists of a portion A wherein an active region 2 is covered by a plate electrode 5 and its sidewall A', and stores signal electric charges. The signals are outputted to a contact 7 with the intermediary of a transfer gate 6. Isolation between capacitors is established by a second isolating region 4, that is, it is established by polycrystalline silicon 10 covered by a thick oxide film 9 and a channel stopper 15. Isolation between transistors is established by a first isolating region 3 incorporating a narrow groove w1. In the same way, the isolation is established by the polycrystalline silicon 10 covered by the thick oxide film 9 and the channel stopper 15. In this method, with a capacitor section extending along the side walls of the second isolating region 4 from a flat section, there is an increase in the storage of electric charges.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a dynamic RAM (random access memory) semiconductor device and a method of manufacturing the same.

(Prior Art) Conventionally, a dynamic RAM semiconductor device has, for example, 19
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b DRAM with Multi-Bit Te
There is one shown in 5t ModejISSCC,
One information cell (hereinafter referred to as a cell) is composed of one capacitor (capacitance) and one access transistor. Signals are stored in capacitors as charges, and the larger the capacitance, the more effective the cell is. Conventional cells require an isolation region between cells, and the cell configuration includes an isolation region, a capacitor, a diffusion layer, an access transistor, and a diffusion layer (data line).

(Problems to be Solved by the Invention) However, in the device having the above structure, it is difficult to separate the cells, and the capacitor part cannot be enlarged due to the formation of the isolation region, so a large value of capacitance cannot be obtained. There was a problem.

Furthermore, when reducing the size of a cell in response to an increase in the capacity of a memory device, there is a problem in that the size of the cell cannot be reduced because the amount of signal charge is small.

The present invention provides a dynamic RAM semiconductor device that eliminates the above-mentioned problems, ensures isolation between cells and expands the capacitor section despite the small cell area, and is capable of increasing the capacity. The purpose is to provide a manufacturing method.

(Means for Solving the Problems) In order to solve the above problems, the present invention provides a first MSM region between transistors in which a thin groove is formed in a semiconductor substrate, and a capacitor region in which a wider trench is formed in a semiconductor substrate. A second isolation region is provided, and a capacitor portion is provided extending from a side wall of the second isolation region.

Furthermore, these different types of isolation regions can be formed simultaneously by changing the groove width of the semiconductor substrate to be narrower.

(Function) According to the present invention, a first separation region between transistors in which a narrow groove is formed in a semiconductor substrate and a second separation region between capacitors in which a wider groove is formed are provided, and this second separation region is provided in a semiconductor substrate. Since a capacitor section can be added to the H'6M region, the corresponding NSI region can be devised and used effectively, ensuring isolation between cells without increasing the cell area, and Capacity can be increased.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

1 and 2 are configuration diagrams of a dynamic RAM semiconductor device according to the present invention, in which FIG. 1 is a plan view thereof, FIG. 2(a) is a sectional view taken along line a-a' in FIG. Figure 2 (b) is b
-b' line sectional view.

As shown in the figure, a transistor/capacitor region (hereinafter referred to as an active region) 2 formed on a semiconductor substrate 1
are island-shaped and separated by a first isolation region 3 having a narrow groove width W1 and a second isolation region 4 having a wide groove width Wa.

In the capacitor part, the active region 2 is connected to the plate electrode 5 (
It is formed by the side wall A' to the part covered by the part (existing at the location where part c is removed), and is adapted to accumulate signal charges. This signal is then outputted to the data line contact 7 via the transfer gate 6.

Next, to explain the features of the present invention based on a cross-sectional view of this device, as shown in FIG. It is formed by part A and side wall part A' of the second isolation region.

The signal stored in the capacitor section is transferred to the data line (diffusion N) 8 via the transfer gate 6.

The isolation between the capacitors described above is performed by the second isolation region 3 using a wide groove width W2.

That is, they are completely separated by the polysilicon lO covered with the thick oxide film 9 and the channel stopper 15 implanted into its bottom.

Further, isolation between the transistors is performed by a first MeM region 3 using a narrow groove width W. That is, as shown in FIG. 2(b), the thick oxide film 9
The transistors are completely isolated by the polysilicon lO surrounded by the channel stopper 15.

As described above, the dynamic RAM of the present invention reliably isolates each transistor and capacitor by the isolation region 3.4 having a narrow groove width W1 and a wider groove width wz, and furthermore, the above-mentioned second A capacitor portion is provided on the side wall portion of the isolation region 4 extending from the plane portion, so that the amount of accumulated charge can be increased.

Next, a method for manufacturing a dynamic RAM semiconductor device according to the present invention will be described.

FIG. 3 is a process diagram showing the manufacturing method of the present invention.

Note that the cross-section shown on the left is a cross-sectional view corresponding to FIG. 2(a), and the cross-section shown on the right is a cross-sectional view corresponding to FIG. 2(b).
) is shown.

First, as shown in FIG. 3(a), a Stow film 21 with a thickness of approximately 500 nm is deposited on a P-type silicon substrate 1 by a thermal oxidation film method.
A SiO□ film 22 having a total thickness of 22 μm is deposited thereon by the PCVN method.

Next, as shown in FIG. 3(b), grooves 23. of different groove widths are formed in the P-type silicon substrate 1 by photoetching.
Form 24. Here, the groove width w1 of the first groove 23 is approximately 1 μm, and the groove width Wz of the second groove 24 is approximately 1.4 μm.

In this way, the groove width W of the first groove 23 and the groove width W2 of the second groove 24 are set to be different. Thereafter, a channel stopper 25 is implanted into the bottom of the groove by ion implantation.
For example, B” (boron ion), BF6゛, etc.
xlQI2~1 xlQ14 (011-”).

Next, approximately 1,000 5rOt films 26 are grown by thermal oxidation, and polysilicon films 26 are grown by LPCVD.
Approximately 5,000 people will deposit 7. Groove width Wl, W! Since W is different, W is completely buried, but the groove width Wg is not completely buried, and a cavity 28 is generated.

In this state, the polysilicon film 27 on the entire surface of the wafer is etched using a gas such as cpa+5%01.

Then, polysilicon is doped with impurities by PoCl3 diffusion method, and further CVD 5hot film 22.5inz
When the film 21 is removed, as shown in FIG. 3(d),
Different types of isolation regions can be formed simultaneously.

Next, a capacitor oxide film 29 is grown by 100 to 200 people, and a polysilicon film 30 that will become a plate electrode is grown. Therefore, the entire surface was thermally oxidized, and the Sing film 31 was
By growing the polysilicon film 32 by 5,000 times and etching it back, the groove in the second isolation region can also be completely flattened, as shown in FIG. 3(e).

Next, the polysilicon film is patterned by photoetching to form a plate electrode 33.

Then, as shown in FIG. 3(f), ions for the transfer gate are implanted by an ion implantation method using a thermal oxidation method to form a gate film 34 of the transfer gate.
Usually, Bo is implanted by 1X10" to 1X10"(cm-").

Next, after depositing a polysilicon film or a metal silicide film, a transfer gate electrode 35 is formed by photolithography. For example, an N-type dopant is implanted by ion implantation to form the source/drain 36.
As' (arsenic ion), 0.6 to 1 XIO16 (a
After hammering in about 300 mm, the main part is completed as shown in Figure 3 (g).

Thereafter, the dynamic RAM according to the present invention can be manufactured by applying wiring of aluminum, silicon, etc. using a commonly known method.

In this way, the groove width of the isolation region is devised to provide a first groove with a narrow groove width and a second groove with a wide groove width, and while performing the same wafer process, the sidewall of the second groove is It is possible to manufacture a dynamic RAM semiconductor device with a high degree of integration and enhanced functionality by extending the capacitor section to the capacitor section.

Next, FIG. 4 is a characteristic diagram showing the relationship between groove depth and cell capacity. As is clear from this figure, the capacitor oxide film thickness tOχ is 100, and the cell size is 3 x 4.7.
(14,1μm8), the cell size 3X4.7(14,1μm8) shows the characteristics as shown in the figure.
Although it is small enough to be mounted on a 4Mb dynamic RAM, it still has a large capacity.

Here, the cell capacitance is expressed in fF (felt farad), and the depth of the groove is expressed in μm.

Note that the present invention is not limited to the above embodiments,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the Invention) As described in detail above, according to the present invention, (1) in a dynamic RAM semiconductor device, two types of isolation regions with different groove widths for forming cells are provided in a semiconductor substrate, and one of (2) In order to manufacture this dynamic RAM semiconductor device, (a) a first silicon oxide film is formed on a semiconductor substrate; (b) forming a narrow first groove and a wide second groove in the semiconductor substrate covered with the silicon oxide film; (C) Next, a second silicon oxide film is provided, a polysilicon film is formed on the second silicon oxide film, the entire surface of the polysilicon film is etched, and then the polysilicon film is etched. (d) Next, a silicon oxide film for a capacitor is formed, a polysilicon film to be a plate electrode is formed on top of the silicon oxide film, and the entire surface of the silicon oxide film is doped with impurities and the first silicon oxide film is removed. After forming a third silicon oxide film, a step of forming a polysilicon film again and etching it back, and (e) a step of buttering the polysilicon film to form a plate electrode are provided. As a result, cells can be reliably separated in a small space, and the separation region can be effectively used as a capacitance section, resulting in a significant increase in capacity and enhancement of functionality.

As described above, the present invention greatly contributes to improving the degree of integration and functionality of dynamic RAM.

[Brief explanation of the drawing]

FIG. 1 is a plan view of a dynamic RAM semiconductor device according to the present invention, FIG. 2 is a sectional view of main parts of the dynamic RAM semiconductor device according to the present invention, and FIG. 3 is a manufacturing process diagram of the dynamic RAM semiconductor device according to the present invention. , FIG. 4 is a characteristic diagram showing the relationship between groove depth and cell capacity. A, A'... Capacitor section, 1... Semiconductor substrate (P
type), 2...active area, 3...first separation area, 4...second portion! ! ! ! Region, 5.33... Plate electrode, 6.35... Transfer gate, 9
．． 26'... Thick oxide film, 10.27'... Buried polysilicon, 11.29... Capacitor gate film, 12.34... Gate film of transfer gate,
13.31...SiO snow film, 14.32.27...
Polysilicon, 15.25...Channel stopper, 2
1...5iO1 film, 23... first groove, 24...
Second groove, 28...Cavity, 30...Polysilicon film.

Claims (3)

[Claims] (1) Two types of isolation regions with different trench widths for forming cells are provided in a semiconductor substrate, and a capacitor portion is extended to the side wall of one of the isolation regions having a wide trench width. Dynamic RAM semiconductor device. (2) A patent claim characterized in that the capacitor portion is composed of a substantially U-shaped plate electrode disposed within an isolation region having a wide groove width and a silicon oxide film formed between a side wall of the isolation region. Dynamic RAM semiconductor device according to item 1. (3) (a) forming a first silicon oxide film on a semiconductor substrate; (b) forming a narrow first groove and a wide groove in the semiconductor substrate covered with the silicon oxide film; (c) Next, a second silicon oxide film is provided, a polysilicon film is formed thereon, and the entire surface of the second silicon oxide film is formed. (d) Next, a silicon oxide film for a capacitor is formed, and a plate is formed on top of the polysilicon film. Form a polysilicon film that will become an electrode,
After forming a third silicon oxide film on the entire surface, forming a polysilicon film again and etching back; and (e) patterning the polysilicon film to form a plate electrode. A method of manufacturing a dynamic RAM semiconductor device characterized by: