JPS6240747B2 - - Google Patents

Info

Publication number
JPS6240747B2
JPS6240747B2 JP58064777A JP6477783A JPS6240747B2 JP S6240747 B2 JPS6240747 B2 JP S6240747B2 JP 58064777 A JP58064777 A JP 58064777A JP 6477783 A JP6477783 A JP 6477783A JP S6240747 B2 JPS6240747 B2 JP S6240747B2
Authority
JP
Japan
Prior art keywords
priority
interrupt
address
channel
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58064777A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59189430A (ja
Inventor
Fumiaki Ishibashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58064777A priority Critical patent/JPS59189430A/ja
Publication of JPS59189430A publication Critical patent/JPS59189430A/ja
Publication of JPS6240747B2 publication Critical patent/JPS6240747B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
JP58064777A 1983-04-13 1983-04-13 割込み制御方式 Granted JPS59189430A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58064777A JPS59189430A (ja) 1983-04-13 1983-04-13 割込み制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58064777A JPS59189430A (ja) 1983-04-13 1983-04-13 割込み制御方式

Publications (2)

Publication Number Publication Date
JPS59189430A JPS59189430A (ja) 1984-10-27
JPS6240747B2 true JPS6240747B2 (enrdf_load_html_response) 1987-08-29

Family

ID=13267972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58064777A Granted JPS59189430A (ja) 1983-04-13 1983-04-13 割込み制御方式

Country Status (1)

Country Link
JP (1) JPS59189430A (enrdf_load_html_response)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62247443A (ja) * 1986-03-20 1987-10-28 Fujitsu Ltd チヤネル制御方式
JPS63119074A (ja) * 1986-11-07 1988-05-23 Ricoh Co Ltd 磁気記録再生装置

Also Published As

Publication number Publication date
JPS59189430A (ja) 1984-10-27

Similar Documents

Publication Publication Date Title
US4733348A (en) Virtual-memory multiprocessor system for parallel purge operation
JPH039492B2 (enrdf_load_html_response)
US3704453A (en) Catenated files
US4449181A (en) Data processing systems with expanded addressing capability
JPS6240747B2 (enrdf_load_html_response)
US3432810A (en) Addressing system for a computer employing a plurality of local storage units in addition to a main memory
JPH0684346A (ja) レジスタ制御回路
JPS6242306B2 (enrdf_load_html_response)
JPH05233560A (ja) 多重プロセッサ回路用プロセッサ間連絡システムおよびその方法
US5349564A (en) Multi-port RAM having means for providing selectable interrupt signals
JPS6361697B2 (enrdf_load_html_response)
US3222648A (en) Data input device
KR940003845B1 (ko) 하위레벨 프로세서의 통화로계 버스 선택방법
JP3126130B2 (ja) 割込み制御回路
JP2564318B2 (ja) 通信処理装置
JPS5844417Y2 (ja) チエンジデイテクタ入力モジユ−ル
JP2913702B2 (ja) マルチプロセッサシステムのアクセス受付制御方式
WO1980000884A1 (en) Data system
JP2821176B2 (ja) 情報処理装置
JPH08212130A (ja) ビットフィールド周辺装置
JP3031581B2 (ja) ランダムアクセスメモリおよび情報処理装置
JPS58197536A (ja) デバイス選択方式
JPS61233837A (ja) 割込処理方式
JPH06119250A (ja) メモリ情報保護回路及びメモリ情報保護方法
JPS6168636A (ja) デ−タ処理装置