JPS6239452B2 - - Google Patents
Info
- Publication number
- JPS6239452B2 JPS6239452B2 JP54073642A JP7364279A JPS6239452B2 JP S6239452 B2 JPS6239452 B2 JP S6239452B2 JP 54073642 A JP54073642 A JP 54073642A JP 7364279 A JP7364279 A JP 7364279A JP S6239452 B2 JPS6239452 B2 JP S6239452B2
- Authority
- JP
- Japan
- Prior art keywords
- register
- data
- item
- key
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Calculators And Similar Devices (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7364279A JPS55164961A (en) | 1979-06-11 | 1979-06-11 | Calculator |
US06/154,867 US4367535A (en) | 1979-06-11 | 1980-05-30 | Calculator for cross summing a plurality of operands |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7364279A JPS55164961A (en) | 1979-06-11 | 1979-06-11 | Calculator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55164961A JPS55164961A (en) | 1980-12-23 |
JPS6239452B2 true JPS6239452B2 (en, 2012) | 1987-08-24 |
Family
ID=13524142
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7364279A Granted JPS55164961A (en) | 1979-06-11 | 1979-06-11 | Calculator |
Country Status (2)
Country | Link |
---|---|
US (1) | US4367535A (en, 2012) |
JP (1) | JPS55164961A (en, 2012) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58189761A (ja) * | 1982-04-30 | 1983-11-05 | Casio Comput Co Ltd | 表デ−タ集計処理装置 |
JPS5947638A (ja) * | 1982-09-08 | 1984-03-17 | Sharp Corp | 図表作成装置 |
US4860233A (en) * | 1985-10-22 | 1989-08-22 | Pitchford Leonard J | Dedicated foot/inch calculator |
US4802091A (en) * | 1986-10-31 | 1989-01-31 | International Business Machines Corporation | Method for improving the efficiency of arithmetic code generation in an optimizing compiler using the technique of reassociation |
US5958001A (en) * | 1994-03-31 | 1999-09-28 | Motorola, Inc. | Output-processing circuit for a neural network and method of using same |
US10255228B2 (en) * | 2011-12-06 | 2019-04-09 | Nvidia Corporation | System and method for performing shaped memory access operations |
US11737521B2 (en) | 2021-05-12 | 2023-08-29 | Curt Tucker | Multiple-utility release buckle |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3564226A (en) * | 1966-12-27 | 1971-02-16 | Digital Equipment | Parallel binary processing system having minimal operational delay |
US3593313A (en) * | 1969-12-15 | 1971-07-13 | Computer Design Corp | Calculator apparatus |
US3812470A (en) * | 1972-07-31 | 1974-05-21 | Westinghouse Electric Corp | Programmable digital signal processor |
US3973113A (en) * | 1974-09-19 | 1976-08-03 | Goldsamt Alan B | Electronic calculator for feet-inch-fraction numerics |
US4128880A (en) * | 1976-06-30 | 1978-12-05 | Cray Research, Inc. | Computer vector register processing |
-
1979
- 1979-06-11 JP JP7364279A patent/JPS55164961A/ja active Granted
-
1980
- 1980-05-30 US US06/154,867 patent/US4367535A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4367535A (en) | 1983-01-04 |
JPS55164961A (en) | 1980-12-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS60193066A (ja) | 電子式計算機 | |
US3202805A (en) | Simultaneous digital multiply-add, multiply-subtract circuit | |
JPS6239452B2 (en, 2012) | ||
JPS6227412B2 (en, 2012) | ||
JPS6137654B2 (en, 2012) | ||
JPS592940B2 (ja) | 電子機器の入力デ−タ訂正方式 | |
US4346450A (en) | Electronic calculator having item count display | |
JPS5498549A (en) | Document totalizer | |
JP2985965B2 (ja) | 因数分解装置 | |
JPS6321939B2 (en, 2012) | ||
JPS6225213B2 (en, 2012) | ||
JPS60237503A (ja) | シ−ケンスコントロ−ラの高速処理方式 | |
JP3498323B2 (ja) | 電子式計算機及び演算処理方法 | |
GB857511A (en) | Improvements in or relating to dividing multiplying arrangements for electronic digital computing machines | |
JPS609878Y2 (ja) | 卓上計算機 | |
JPH0225210B2 (en, 2012) | ||
JPH0264730A (ja) | 演算装置 | |
JPH021627Y2 (en, 2012) | ||
JPS6315958Y2 (en, 2012) | ||
JPS5875262A (ja) | 電子計算機 | |
JPS5921068B2 (ja) | プログラムステツプ算出方式 | |
JPH0456349B2 (en, 2012) | ||
JPS6226498B2 (en, 2012) | ||
JPH0743649B2 (ja) | 演算回路 | |
JPS6226496B2 (en, 2012) |