JPS623943B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photomask substrate that greatly facilitates mask alignment work in the manufacture of semiconductor devices.

Conventionally, when manufacturing a semiconductor device, particularly a semiconductor integrated circuit device, a photolithography process is repeated at least five times before a metal wiring layer is formed on a semiconductor wafer.

In this photolithography process, the next circuit element pattern is transferred onto the circuit element pattern formed on the surface of the semiconductor wafer, so the relative positional accuracy between the semiconductor wafer and the photomask substrate is extremely important in improving the manufacturing yield of semiconductor devices. On the other hand, it is important to quickly align the photomask substrate, which is a very important factor in improving productivity. Advances in alignment equipment have enabled automatic supply and placement of semiconductor wafers directly beneath photomask substrates, greatly reducing setup time. However, in conventional pattern alignment work, before aligning the mask alignment marks in the chip area of the semiconductor wafer and the alignment marks on the photomask substrate, it is necessary to quickly place the mask alignment marks on the photomask substrate in the field of view of the microscope of the alignment device. It is becoming extremely difficult to discover. In the photomask substrate,
The mask alignment mark formed within the chip area pattern is usually small in length on one side so that it can be easily confirmed and does not reduce the effective area of the chip area on the semiconductor substrate.
A square or cross-shaped pattern of about 10 to 60 μm is used. In order to arrange these mask alignment marks for the number of photolithographic processes, for example 6,
It requires an occupied area of about 35000μ ² m. Currently, the field of view obtained with the alignment scope of the alignment device during mask alignment is, for example, the contact method.
It is about 1.2×10 ⁵ to 1.2×10 ⁶ μ ² m, and about 2×10 ⁵ to 8×10 ⁵ μ ² m in the reflection projection method.

In order to align the circuit element pattern drawn on the photomask substrate with the circuit element pattern formed on the semiconductor substrate, it is necessary to place mask alignment marks on the photomask substrate in the field of view of the microscope. It has drawbacks.

In recent years, with the increase in the density of integrated circuits, the chip area has become larger, for example, the chip area is 2 × 10 ⁷ μ ² m.
(4 x 5 mm) and the average field of view area during alignment of the alignment device is 4 x 10 ⁵ μ ² m, then with the current alignment device only 2% of the chip area can be observed at one time. Therefore, it is extremely difficult for a mask alignment worker to quickly find a mask alignment mark in the field of view of a microscope.

In order to eliminate this drawback, it is necessary to always place the mask alignment mark on the photomask substrate at a predetermined position, but when forming an integrated circuit pattern, designers always aim for a pattern layout that occupies the minimum area. However, a predetermined position on the photomask substrate surface is not always open for mask alignment marks. It is also possible to place the mask alignment marks near the grid lines, but the bonding areas are originally lined up near the grid lines, and it is difficult to place all the multiple mask alignment marks required for each photolithography process. .

FIG. 1 is a diagram showing the time required to find the alignment mark on a photomask substrate of a certain IC type. It shows the variation in the average time required to detect the alignment mark four times for each of 10 alignment devices of the same type.
As a result, it is understood that it is extremely difficult to shorten the time it takes to find a mask alignment mark to 4 minutes or less.

SUMMARY OF THE INVENTION In order to eliminate these drawbacks, the present invention provides a photomask substrate that allows mask alignment marks to be found within an extremely short period of time.

A plan view of a photomask substrate according to a first embodiment of the present invention is shown in FIG. 2a, and a cross-sectional view is shown in FIG. 2b.

In FIG. 2a, 1 is a substrate made of glass or quartz, for example, which is transparent to the irradiation light for exposure, and grid lines 2 made of a material that does not transmit the irradiation light are arranged on the surface of the substrate 1. is formed. The width of this grid line 2 is about 100 μm. A chip region 3 is defined by the grid line 2 . Within this chip area 3, at least one mask alignment mark 4 of opaque material is formed. Furthermore, mask alignment mark detection marks 5 and 6 are formed from this mask alignment mark 4, which are arranged adjacent to or in contact with the grid lines in the X-axis and Y-axis directions. Reference numeral 11 indicates the field of view of the alignment scope of the alignment device during mask positioning.A method for finding mask alignment marks in a short time using the photomask substrate shown in FIG. 2 will be described below. First, alignment scope field of view 1
Insert the grid line 2 of the X-axis or Y-axis within 1,
Next, while keeping the X-axis or Y-axis of the grid line within the field of view of the alignment scope, the aforementioned grid line 2 is moved to bring the mask alignment mark detection mark 5 into the field of view 11 of the alignment scope.

Next, the photomask substrate or alignment scope is moved perpendicularly to the X-axis or Y-axis of the grid line to bring the mask alignment mark formed on the surface of the photomask substrate into the field of view 11 of the alignment scope. In this way, it is possible to discover the coordinate position of the mask alignment mark in a short time by starting by placing the easily discoverable grid line in the field of view of the microscope.

Figure 3 shows an example of mask alignment mark detection marks when the mask alignment marks are dispersed. 2 is the grid line, 4 is the first mask alignment mark, and 5 and 6 are the first mask alignment marks that indicate their positions. The mark detection mark 7 is a second mask alignment mark, and 8 and 9 are second mask alignment mark detection marks indicating the position of the second mask alignment mark 7. In this way, it is necessary to give consideration to the second and subsequent mask alignment mark detection marks so that the order in which they are aligned is easily understood by giving them a type or number that makes it easy to confirm the order.

FIG. 4 is a diagram showing the range of positions where mask alignment mark detection marks are inserted. The mask alignment mark detection marks 5 and 6 are placed outside the grid line on the straight line of the pattern at the edge of the group of mask alignment marks 4.
If it is within 100μ (10 in Fig. 4), it will be easier to find the mask alignment mark.

As a result, the task of searching for mask alignment marks on the semiconductor wafer and glass mask on the alignment scope, which must be carried out at the beginning of the mask alignment operation, becomes easy, and the efficiency of the operation can be improved. Also, the size of the mask alignment mark detection mark is 15μ on each side, which is sufficient for checking with a general alignment scope, so there is no need to make it large. Here, a case is shown in which marks are placed only on the grid line side close to the top and bottom and left and right mask alignment marks, but even if these marks are placed on all four sides, there is also a provision that they can only be placed at one point on the top and bottom or left and right. However, in actual work, it is better to stipulate that it should be placed at only one point, which reduces confusion and improves work efficiency.

Figure 5 shows the time required to find the alignment mask for the photomask substrate shown in Figure 2 for the IC type in Figure 1, and it is necessary to detect the alignment mark four times for each of the 10 same type alignment devices. It shows the variation in the average time required. It is understood that this reduces the time required to find the mask alignment mark to less than 4 minutes.

As described above, according to the present invention, mask alignment marks on semiconductor wafers and glass masks can be easily found, so that the working time for searching for mask alignment marks can be greatly reduced.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the time required to find the alignment mark on a photomask substrate of a certain IC type, FIG. 2 is a plan view and a cross-sectional view of a photomask substrate according to the first embodiment of the present invention, and FIG. FIG. 4 is a plan view of a photomask substrate according to a second embodiment of the present invention, FIG. 4 is a diagram showing the range of positions for inserting mask alignment mark detection marks according to the present invention, and FIG. FIG. 3 is a diagram showing the time consumed until finding the alignment mark in the case of the case of FIG. 1...Transparent substrate, 2...Grid line, 4,
7...Mask alignment mark, 5, 6, 8, 9...
Mask alignment mark detection mark, 11... Field of view of alignment scope.

Claims (1)

[Claims] 1 Grid lines made of an opaque material arranged in a grid pattern on the surface of a transparent substrate, a mask alignment mark made of an opaque material arranged on the surface of the transparent substrate surrounded by the grid lines, and an X-axis or / and a mask alignment mark detection mark disposed adjacent to or in contact with the grid line in the Y-axis direction.