JPS6239300U - - Google Patents

Info

Publication number
JPS6239300U
JPS6239300U JP13209985U JP13209985U JPS6239300U JP S6239300 U JPS6239300 U JP S6239300U JP 13209985 U JP13209985 U JP 13209985U JP 13209985 U JP13209985 U JP 13209985U JP S6239300 U JPS6239300 U JP S6239300U
Authority
JP
Japan
Prior art keywords
shift
clock
data
shift register
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13209985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13209985U priority Critical patent/JPS6239300U/ja
Publication of JPS6239300U publication Critical patent/JPS6239300U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Shift Register Type Memory (AREA)
  • Tests Of Electronic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案の一実施例を示す回路系統図である
。 1……D型フリツプフロツプ、2……クロツク
パルス入力端子、3……データ入力端子、4……
シフトレジスタ、5……シフトクロツク入力端子
The figure is a circuit system diagram showing an embodiment of the present invention. 1...D-type flip-flop, 2...Clock pulse input terminal, 3...Data input terminal, 4...
Shift register, 5...Shift clock input terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] シフトクロツクに基づいて入力データのシフト
動作を行なうシフトレジスタと、シフトされるべ
きデータがそのデータ端子に供給されると共に、
該シフトクロツク以上の繰り返し周波数のクロツ
クパルスがそのクロツク端子に供給され、その出
力端子より出力するデータを該シフトレジスタへ
前記入力データとして供給するD型フリツプフロ
ツプとより構成してなるシフトレジスタ装置。
A shift register that performs a shift operation of input data based on a shift clock, and data to be shifted is supplied to its data terminal,
A shift register device comprising a D-type flip-flop to which a clock pulse having a repetition frequency higher than the shift clock is supplied to its clock terminal, and which supplies data outputted from its output terminal to the shift register as the input data.
JP13209985U 1985-08-29 1985-08-29 Pending JPS6239300U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13209985U JPS6239300U (en) 1985-08-29 1985-08-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13209985U JPS6239300U (en) 1985-08-29 1985-08-29

Publications (1)

Publication Number Publication Date
JPS6239300U true JPS6239300U (en) 1987-03-09

Family

ID=31031169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13209985U Pending JPS6239300U (en) 1985-08-29 1985-08-29

Country Status (1)

Country Link
JP (1) JPS6239300U (en)

Similar Documents

Publication Publication Date Title
JPS6239300U (en)
JPS607156U (en) mass marker circuit
JPS6140760U (en) Digital signal correction device
JPS61116436U (en)
JPS633629U (en)
JPS62300U (en)
JPS6257442U (en)
JPH0357630U (en)
JPS5866375U (en) receiving phaser
JPS59118036U (en) data input circuit
JPS586435U (en) Multiphase generation circuit
JPS5936627U (en) Clock pulse extraction circuit
JPH0216617U (en)
JPH0163224U (en)
JPS60155049U (en) signal processing device
JPS5866734U (en) oscillation circuit
JPH0439740U (en)
JPS62109522U (en)
JPS60119138U (en) Pulse generation circuit
JPS61179830U (en)
JPS60169960U (en) Clock signal extraction circuit
JPS5882039U (en) phase comparison circuit
JPS58101232U (en) microcomputer
JPS601034U (en) staircase wave generator
JPS59157335U (en) Multiphase clock generation circuit