JPS6231815B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for manufacturing a semiconductor substrate for a power transistor for electric power.

In the conventional method for manufacturing a semiconductor substrate, as shown in FIG. 1A, first, an N-type substrate 1 having a thickness of 300 μm and a #1000 lap finish is prepared. Next, figure B
As shown in FIG. 1, N ⁺ type impurities are deposited on both sides of the substrate 1 at a temperature of 1200° C. for 3 hours using phosphorus oxychloride (POCl ₃ ) as a diffusion source.
Depth 20μ, surface concentration of impurity layer 4-6×10 ²¹ /
A N ⁺ deposition layer 2 of cm ³ is formed. Next, as shown in Figure C, only the N ⁺ deposition layer 2 on one side of the substrate 1 is removed using a chemical etching solution.
Thereafter, as shown in FIG.
After forming the substrate 1, the substrate 1 is placed in a stacked state under pressure, and slumping is performed to push the N ⁺ impurity into the substrate to a depth of 190μ and a surface concentration of the impurity layer of 1×.
An N ⁺ diffusion layer 4 having a density of 10 ²⁰ /cm ³ or more is obtained as shown in FIG. Next, this is immersed in a hydrofluoric acid solution for 4 to 7 days to remove the silicon oxide film 3 on the surface of the substrate 1, as shown in FIG. In this way, the back side
The depth of the N ⁺ diffusion layer is 190μ, and the N ^- becomes the collector region.
A single-sided chemically etched substrate was made with a layer depth of 60μ and a substrate 1 thickness of 250μ. However, conventional semiconductor substrate manufacturing methods include
It had the following shortcomings.

As shown in FIG. 4, the phosphorus in the highly concentrated N ⁺ deposition layer 2 on the back side circulates to the opposite main surface (N ^- layer) of the substrate 1, penetrates the weak part of the silicon oxide film 3, and is deposited on the N ^- surface. Partial N ⁺ layer 4
Due to the formation of the emitter a, an open emitter collector reverse current (I _CBO ) defect occurs, which is the main cause of a decrease in yield.

Because the high-temperature, long-term, pressurized stack diffusion is carried out in a mixed atmosphere of nitrogen and oxygen, it takes a very long time (4 days to
It requires immersion in hydrofluoric acid for 7 days), which hinders shortening of production time. Furthermore, since it is not easy to separate the substrates 1 from each other, cracks occur in the substrates during the substrate separation step.

The present invention has been made in view of these points,
Even with pressurized stack diffusion, the immersion time in hydrofluoric acid can be shortened and the substrates can be quickly separated from each other, allowing phosphorus to wrap around the main surface of the substrate,
Emitter open collector reverse current (I
_CBO ) aims to provide a method for manufacturing semiconductor substrates with almost no defects.

In the present invention, a three-layer multilayer film consisting of a silicon oxide film, a silicon polycrystalline film, and a silicon nitride film is used as a phosphorus mask material for a silicon single crystal substrate, that is, a silicon compound thin film. The three-layer multilayer film used in the present invention has a triple structure consisting of a silicon oxide film with a thickness of 1 to 2 μm as the lower layer of the multilayer film, a silicon polycrystalline film with a thickness of 4000 to 8000 Å as an intermediate layer, and a silicon nitride film with a thickness of 1000 to 1500 Å as an upper layer. This provides a greater masking effect for phosphorus than a silicon oxide film of the same thickness, and the silicon polycrystalline film cancels out stress and strain caused by the difference in thermal expansion coefficients between silicon and silicon nitride films. This makes it possible to prevent cracks from occurring. Further, by forming a silicon nitride film as the uppermost layer of the three-layer multilayer film, it is possible to easily separate the substrates from each other after high-temperature and long-term pressurized stack diffusion.

Embodiments of the present invention will be described below with reference to the drawings. As shown in FIG. 2A, first, an N-type substrate 5 with a #1000 lap finish and a thickness of 300 μm is prepared. Next _, as ^shown in FIG. Concentration is 4~
A N ⁺ deposition layer 6 of 6×10 ²¹ /cm ³ is formed.
Next, as shown in FIG.
A thickness of approximately 30 μm is removed using a solution of acetic acid (HAC):nitric acid (HNO ₃ )=1:2:3. Next, figure D
As shown in the figure, this was heated to 1000℃ in a steam atmosphere.
Oxidation is carried out for 4 hours to form a silicon oxide film 7 with a thickness of 1.0 to 1.2 μm. Next, a silicon polycrystalline film 8 with a thickness of 4000 to 8000 Å is coated on the silicon oxide film 7 using a gas phase reactor equipped with a gas supply source such as monosilane (SiH ₄ ) or helium (He). wear. Next, the supplied gas is switched to ammonia (HN ₄ ) and dichlorosilane (SiH ₂ Cl ₂ ), and a silicon nitride film 9 with a thickness of 1000 to 1500 Å is deposited on the silicon polycrystalline film 8. The thus formed three-layer multilayer film 10 consisting of the silicon oxide film 7, the silicon polycrystalline film 8, and the silicon nitride film 9 functions as a diffusion mask for phosphorus and at the same time as an adhesion prevention film between the substrates. Next, as shown in FIG. 3, the base wafers 11 on which the three-layer multilayer film 10 has been formed are stacked under pressure with their main surfaces facing each other, and placed in the diffusion boat 1.
5 between the guide plates 14 in an oxidizing atmosphere,
For example, nitrogen (N ₂ ): oxygen (O ₂ ) = 3:1 and 1270
N ⁺ impurities were injected (slumping) under the treatment conditions of 250 hours at ℃ to form a second N ⁺ layer 13 with a depth of 190 μ and a surface concentration of 1 × 10 ²⁰ /cm ^{3 or} more.
Obtain as shown in Figure E. The substrate wafers 11 are
Because of the pressure stack diffusion, there is close contact, but there is not as strong a bond as with conventional methods. Furthermore, since the three-layer multilayer film 10 is heat-treated in an oxidizing atmosphere, the entire three layers have changed to the silicon oxide film 12.The stacked substrate 20 shown in FIG. Substrate wafers 11 can be easily separated from each other by dipping for a minute. As a result, Figure 2 F
As shown in FIG. 2, a semiconductor substrate 21 whose one side is finished by etching can be obtained. In addition, three-layer multilayer film 1
0 serves as a mask on the main surface side to be formed on both sides of the substrate, and also serves to reduce phosphorus from popping out from the back surface. Incidentally, the relationship between the pipe density and diffusion time, which indicates the state of N ⁺ impurity entering the N ^- surface due to the jump of N ⁺ impurities from the back surface and diffusion furnace during N ⁺ slumping, is different from that according to the present invention () and the conventional method. As is clear from Fig. 5, the pipe density of the method according to the present invention is almost zero regardless of the elapse of the diffusion time, and it can be seen that it is far superior to the method using the conventional method. .

As explained above, according to the method for manufacturing a semiconductor substrate according to the present invention, by providing a three-layer multilayer film, deep diffusion in the high concentration layer on one side is prevented from diffusing outward to the other side, and The multilayer film makes it easy to separate the substrate after pressure stack diffusion.
It has remarkable effects such as shortening manufacturing time and drastically reducing cracking of the substrate.

[Brief explanation of the drawing]

1A to 1F are cross-sectional views showing the conventional semiconductor substrate manufacturing process, and FIGS. 2A to 2F are cross-sectional views showing the semiconductor substrate manufacturing process according to the present invention.
Figure 3 is a front view of the stack board, Figure 4 is
An explanatory diagram showing the back side during N ⁺ slumping, N ⁺ impurities flying out from the diffusion furnace, and N ⁺ impurities entering the N ^- surface (pipe). Figure 5 shows the relationship between pipe density and diffusion time. It is a characteristic diagram. 5... Semiconductor substrate, 6... Deposition layer, 7... Silicon oxide film, 8... Silicon polycrystalline film, 9... Silicon nitride film, 10... Three-layer multilayer film, 11... Base wafer, 14... Guide plate, 15... Diffusion boat , 20
...Stack substrate, 21 ...Semiconductor substrate.

Claims (1)

[Claims] 1. Forming a high concentration impurity layer of the same conductivity type as the semiconductor substrate on one side of a semiconductor substrate, and forming a silicon oxide film, a silicon polycrystalline film, on the exposed surface of the semiconductor substrate and the surface of the high concentration impurity layer, A slumping layer is formed by sequentially stacking silicon nitride films, and by heating the semiconductor substrate in a pressurized stacked state in an oxidizing atmosphere to introduce impurities constituting the high concentration impurity layer into the semiconductor substrate. Manufacturing a semiconductor substrate, comprising the steps of integrally oxidizing the silicon oxide film, silicon polycrystalline film, and silicon nitride film to form an oxide film, and removing the oxide film. Method.