JPS5812340A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5812340A
JPS5812340A JP11139181A JP11139181A JPS5812340A JP S5812340 A JPS5812340 A JP S5812340A JP 11139181 A JP11139181 A JP 11139181A JP 11139181 A JP11139181 A JP 11139181A JP S5812340 A JPS5812340 A JP S5812340A
Authority
JP
Japan
Prior art keywords
film
under
silicon nitride
glass film
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11139181A
Other languages
Japanese (ja)
Inventor
Manzo Saito
斉藤 万蔵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11139181A priority Critical patent/JPS5812340A/en
Publication of JPS5812340A publication Critical patent/JPS5812340A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To easily smooth the irregularities of a glass film surface comparing when the glass film surface is exposed under oxidizing atmosphere at normal pressure by a method wherein the glass film is exposed under high temperature oxidizing atmosphere under the pressurized condition by previously growing a silicon nitride film under a phosphorus silicic acid glass film. CONSTITUTION:After introducing an N type impurity in a substrate 11 by an ion implantation method, the N type impurity is annealed to form an N type region 15. Next, after forming a silicon nitride film 16 having a film thickness of 500Angstrom by a vapor growth method, a PSG film 17 containing 5% of phosphorus is formed with a film thickness of 1.5mum as a layer insulating film by a vapor growth method. Next, the PSG film 17 is smoothed by applying thermal treatment for 60min under oxygen and hydrogen combustion atmosphere under a pressurized condition of 9kg/cm<2> at 950 deg.C.

Description

【発明の詳細な説明】 この発明は、半導体装置の製造方法にかか)、特に現在
実現可能なP2O(リンケイ酸ガラス)膜の平滑化熱処
理よりも、より容易かつ有効なKO膜の平滑化熱処理方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device), and particularly to a method for smoothing a KO film that is easier and more effective than the currently available smoothing heat treatment for a P2O (phosphosilicate glass) film. It relates to a heat treatment method.

半導体素子は、素子製造過程に於いて、半導体基板の−
1面上に絶縁膜、半導体層、金属膜が形成或いは選択的
に除去され、該主表面上に凹凸が形成され今、かかる凹
凸が激しいと、微細構造の加工か困難となり、特に凹凸
が最も大きくなる金属配線工程にて著るしい製造上の困
難を*たす。
During the device manufacturing process, semiconductor devices undergo
An insulating film, a semiconductor layer, or a metal film is formed or selectively removed on one surface, and unevenness is formed on the main surface.If the unevenness is severe, it becomes difficult to process microstructures. Significant manufacturing difficulties arise in the increasingly large metal wiring process.

製造工程中にて急峻な段差を生じた半導体素子に金属配
IIを行なうと、該金属配lIは急峻な段差部分にて断
線したり、或いはms金属配線と短絡する確率が着るし
く高まり、その結果製造上の良品率の低下を来たす。
When a metal interconnection II is applied to a semiconductor element that has a steep step difference during the manufacturing process, the probability that the metal interconnection II will be disconnected at the steep step portion or short-circuited with the ms metal interconnection will increase considerably. As a result, the rate of non-defective products in manufacturing decreases.

従来はかかる前記凹凸を平滑化するために、該凹凸構造
上IIcP801[t″形成、次に該ガラス膜を軟化温
度前後の高温にて、常圧(1気圧)或いは1気圧より高
い加圧状態の酸化性雰囲気にて軟化及び平滑化する方法
がありた。しかしながら、ガラスNo組成にも依るが、
常圧にて処理する場合には軟化温度が半導体製造プ四セ
スに適用する上で高すぎ、素子特性の劣化t−きたすと
いう大きな問題があ5友、またt加圧状態にて処理する
場合、I!#に、平滑化効果の顕著な、水素を含有せる
酸化性雰囲気中にて処理する場合に社比較的低温で、し
かも低リン濃度のP8Glifを平滑化できるという利
点を有する。しかし、酸化膜の成長作用が大キく、従っ
て、従来技術の如く、基体とPSG膜との間に耐酸化マ
スク性を有する膜のない場合には、前記加圧状態の水素
含有雰囲気中に於ける平滑化熱処理を十分に行々うと基
板上に厚い酸化膜が形成されるという欠点を有する。P
2O膜のζ。
Conventionally, in order to smooth out the unevenness, IIcP801[t'' was formed on the uneven structure, and then the glass film was subjected to normal pressure (1 atm) or a pressurized state higher than 1 atm at a high temperature around the softening temperature. There was a method of softening and smoothing in an oxidizing atmosphere.However, depending on the glass No. composition,
When processing under normal pressure, the softening temperature is too high for application to semiconductor manufacturing processes, leading to a major problem of deterioration of device characteristics.Furthermore, when processing under pressure, there is a major problem: ,I! Another advantage is that P8Glif with a low phosphorus concentration can be smoothed at a relatively low temperature when treated in an oxidizing atmosphere containing hydrogen, which has a remarkable smoothing effect. However, the growth effect of the oxide film is strong, and therefore, when there is no film with oxidation-resistant masking properties between the substrate and the PSG film as in the prior art, it is difficult to use the hydrogen-containing atmosphere under pressure. However, if the smoothing heat treatment is not carried out sufficiently, a thick oxide film is formed on the substrate. P
ζ of 2O film.

平滑化が必要とされるのは、通常基板中に高濃度OP型
或いはN型の不純物が拡散された後なので、不純物拡散
層上に厚い酸化膜が形成されると不純物の顕著な再分布
や漏洩電流の増大など、PN接合特性を始めとした素子
特性の劣化を来たしたり、該厚い酸化膜上のコンタクト
孔開孔工程で著るしい製造上の困難を生じるので、前記
加圧状態の、特に水素を含有せる雰囲気中に於ける平滑
化熱処理を十分に行なうことはできないという欠点を有
する。
Smoothing is normally required after high concentration OP-type or N-type impurities have been diffused into the substrate, so if a thick oxide film is formed on the impurity diffusion layer, significant redistribution of impurities may occur. In the pressurized state, it may cause deterioration of device characteristics such as PN junction characteristics such as an increase in leakage current, or cause significant manufacturing difficulties in the process of forming contact holes on the thick oxide film. In particular, it has the disadvantage that smoothing heat treatment cannot be carried out satisfactorily in an atmosphere containing hydrogen.

本発明の目的は、かかる欠点を除去し、リンケイ酸ガラ
ス膜の平滑化を容易にした半導体装置製造方法を提供す
る事である。
An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates such drawbacks and facilitates smoothing of a phosphosilicate glass film.

本発明は前記リンケイ酸ガラス膜を平滑化するに当り、
リンケイ酸ガラス膜の下に予めシリコン窒化膜全成長さ
せておけば該ガラス膜は加圧状態の高温酸化性雰囲気中
に曝されることにより、該ガラス膜表面の凹凸は常圧に
於て酸化性雰囲気に曝されるよりも容易に平滑化され、
しかも該ガラス膜下に形成されたシリコン窒化M#i酸
化されず、従って基板上にも酸化膜が成長しないという
知見に基づく。
In smoothing the phosphosilicate glass film of the present invention,
If a silicon nitride film is completely grown under the phosphosilicate glass film in advance, the glass film will be exposed to a pressurized high-temperature oxidizing atmosphere, and the unevenness on the surface of the glass film will be oxidized at normal pressure. smoothed more easily than exposed to a sexual atmosphere,
Moreover, this is based on the knowledge that the silicon nitride M#i formed under the glass film is not oxidized and therefore no oxide film grows on the substrate.

本発明を用いれば、前記ガラス膜の十分なる平滑化熱処
理を行なうことができ、半導体装置製造の容易化及び高
信頼度化などを図れるという大きな利点を有する。
If the present invention is used, the glass film can be subjected to a sufficient smoothing heat treatment, which has the great advantage of facilitating the manufacture of semiconductor devices and increasing reliability.

次に本発明を実施例につき説明する。第1図は本発明1
fI:MO8半導体型素子上のPSGmgの平滑化に適
用した例である。第1図(んに示す如く、P型中導体基
板ll上に選択的にフィールド酸化膜12(a)及びゲ
ート酸化[112(b)t−形成し、次に多結晶半導体
層13を成長1選択蝕刻し、ゲート電極及び電気配線部
分を結成した後に、該多結晶半導体層は酸化膜14で被
覆され、次にN型不純物がイオン注入法によ)基体11
中に導入され友後にアニールされ、N′M領域15が形
成される0次に、500^の膜厚を有するシリコン窒化
膜16を気相成長法により形成した後に層間絶縁膜とし
てリンt−SS含有せるP8G膜17を気相成長法によ
りて15μmの膜厚に成長する。 このとき、前記多結
晶半導体層13がドライエ、チング法によって精度良く
加工された場合には、該半導体層13の側面部分18t
!通常前記基体11の主表面に対して垂直に近い角度を
有し、また、前記PSGJ[17の前記側面18に対応
する側面19も、前記基体11の主表面と垂直に近い角
度を有する。次に、950℃、9kg/cm2 の加圧
状態の酸素・水素燃焼雰囲気中にて60分間熱処理して
P8G膜17を平滑化した後に、第1図(ハ)に示す如
く、コンタクト孔20t−開孔し、次にアルミ配線21
會形成し、必要なら更に保護膜を該アルミ配線21上に
形成して、半導体装置が出来上る。
Next, the invention will be explained with reference to examples. Figure 1 shows invention 1
This is an example applied to smoothing PSGmg on an fI:MO8 semiconductor type device. As shown in FIG. After selective etching and forming gate electrodes and electrical wiring parts, the polycrystalline semiconductor layer is coated with an oxide film 14, and then N-type impurities are added to the substrate 11 (by ion implantation).
After that, a silicon nitride film 16 having a thickness of 500^ is formed by vapor phase epitaxy, and then a phosphorus t-SS film is introduced as an interlayer insulating film. A P8G film 17 containing P8G is grown to a thickness of 15 μm by vapor phase growth. At this time, if the polycrystalline semiconductor layer 13 is processed with high accuracy by the dry etching method, the side surface portion 18t of the semiconductor layer 13
! Usually, the angle is close to perpendicular to the main surface of the base 11, and the side surface 19 corresponding to the side surface 18 of the PSGJ [17] also has an angle close to perpendicular to the main surface of the base 11. Next, after smoothing the P8G film 17 by heat treatment for 60 minutes in an oxygen/hydrogen combustion atmosphere under pressure of 9 kg/cm2 at 950°C, the contact hole 20t- Open the hole, then aluminum wiring 21
If necessary, a protective film is further formed on the aluminum wiring 21 to complete the semiconductor device.

本実施例では、P2O膜の平滑化熱処理とじて950℃
、圧力9kg/cm 、酸素−水素燃焼雰囲気中という
、極めて酸化作用の強い条件をm−た。
In this example, the smoothing heat treatment of the P2O film was performed at 950°C.
The conditions of extremely strong oxidizing action, such as a pressure of 9 kg/cm and an oxygen-hydrogen combustion atmosphere, were used.

もしも、本実施例の如き強い酸化作用を有する条件下に
て、従来用いられていた構造、即ちシリコン窒化膜16
1有せぬ構造の半導体素子を熱処理すると、前記N型半
導体層15上に、N型領域中の不純物濃度にもよるが・
7000λ以上の厚い酸化gを形成する。tた、前記多
結晶半導体層13上にも同様の厚い酸化膜を形成し、そ
の結果素子特性の劣化や極度の製造上の困難を召き、製
造上の良品率は極端に低下する。しかるに、本実施例で
は、前記窒化膜16の下に酸化膜が成長しないので、前
記した如き素子特性の劣化或いは製造上の困難を召くこ
とな(P2O膜の平滑化熱処理を十分に行なうことがで
きる。
If the conventional structure, that is, the silicon nitride film 16
When a semiconductor element having a structure without 1 is heat-treated, the N-type semiconductor layer 15 has a structure in which, depending on the impurity concentration in the N-type region,
Forms a thick oxide g of 7000λ or more. Furthermore, a similar thick oxide film is formed on the polycrystalline semiconductor layer 13, resulting in deterioration of device characteristics and extreme difficulty in manufacturing, resulting in an extremely low yield rate in manufacturing. However, in this embodiment, since the oxide film does not grow under the nitride film 16, the above-mentioned deterioration of device characteristics and manufacturing difficulties are avoided (sufficient heat treatment for smoothing the P2O film is not required). Can be done.

本実施例では、リン含有量5%のPf9GI117を用
いており、1000℃以下の常圧雰囲気では、該P2O
膜の平滑化処理は極めて困難である。しかるに、酸化作
用の極めて強い加圧状態下であるが故に、前記PSG膜
17も十分に平滑される。
In this example, Pf9GI117 with a phosphorus content of 5% is used, and the P2O
Smoothening the membrane is extremely difficult. However, since the PSG film 17 is under pressure with extremely strong oxidizing effects, the PSG film 17 is also sufficiently smoothed.

以上述べた如く、本発明を用いれば、加圧酸化性雰囲気
中に於けるPSG膜の平滑化熱処理を行なっても、半導
体基体上に新たなる酸化膜の成長を起こすことがない。
As described above, by using the present invention, even if the PSG film is subjected to smoothing heat treatment in a pressurized oxidizing atmosphere, no new oxide film will grow on the semiconductor substrate.

従がって、リン含有量が少なく、そのため耐湿性などの
信頼性は優れるが平滑化され難いPSGjilをも容品
に平滑出来、製品の信頼性を高められるばかりでなく、
コンタクト孔開孔やアルミ配線工程において、製造を著
るしく容易にするばか9でな(、PN接合特性の劣化な
どの素子特性の劣化も引き起こさないので、製品の良品
率や信頼性の著るしい向上を図れるという大きな効果を
期待できる。
Therefore, PSGjil, which has a low phosphorus content and has excellent reliability such as moisture resistance, but is difficult to smooth, can be smoothed into a container, which not only increases the reliability of the product.
This method significantly simplifies manufacturing in the contact hole drilling and aluminum wiring processes. This can be expected to have a significant effect on improving performance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の詳細な説明するための断面図であり、
11・・・・・・P型基板、12・・・・・・酸化膜、
13・・・・・・多結晶半導体、14・・・・・・酸化
膜、15・・・・・・N型半導体層、16・・・・・・
窒化膜、17・・・・・・PEG膜、18・・・・・・
多結晶半導体層13の側面、19・・・・・・PEG膜
17の側面、20・・・・・・コンタクト化、21・・
・・・・アルミ配線、である。
FIG. 1 is a sectional view for explaining the present invention in detail,
11... P-type substrate, 12... Oxide film,
13... Polycrystalline semiconductor, 14... Oxide film, 15... N-type semiconductor layer, 16...
Nitride film, 17...PEG film, 18...
Side surface of polycrystalline semiconductor layer 13, 19... Side surface of PEG film 17, 20... Contact formation, 21...
...Aluminum wiring.

Claims (1)

【特許請求の範囲】[Claims] 半導体基板の−1面上に、窒化ケイ素膜を成長する工程
と、該窒化ケイ素膜上にりyl不純物として含むシリコ
ン酸化膜を成長する工程と、該シリコン酸化膜kl気圧
より高い圧力下の酸化性雰囲気中に於いて熱処理する工
程を含む事tI!#黴とする半導体装置の製造方法。
A step of growing a silicon nitride film on the -1 plane of a semiconductor substrate, a step of growing a silicon oxide film containing yl impurity on the silicon nitride film, and oxidation of the silicon oxide film under a pressure higher than kl atmospheric pressure. Including a process of heat treatment in a sexual atmosphere! #A method for manufacturing semiconductor devices using mold.
JP11139181A 1981-07-16 1981-07-16 Manufacture of semiconductor device Pending JPS5812340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11139181A JPS5812340A (en) 1981-07-16 1981-07-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11139181A JPS5812340A (en) 1981-07-16 1981-07-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5812340A true JPS5812340A (en) 1983-01-24

Family

ID=14559972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11139181A Pending JPS5812340A (en) 1981-07-16 1981-07-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5812340A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6187353A (en) * 1984-06-20 1986-05-02 Hitachi Ltd Semiconductor integrated circuit device
JPS61154149A (en) * 1984-12-27 1986-07-12 Fujitsu Ltd Semiconductor device and manufacture thereof
JPS61268043A (en) * 1985-05-23 1986-11-27 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture thereof
JPS6218040A (en) * 1985-07-17 1987-01-27 Matsushita Electronics Corp Flattening of phosphosilicate glass film
JPS63124448A (en) * 1986-11-13 1988-05-27 Fujitsu Ltd Manufacture of semiconductor device
US6514876B1 (en) 1999-09-07 2003-02-04 Steag Rtp Systems, Inc. Pre-metal dielectric rapid thermal processing for sub-micron technology

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6187353A (en) * 1984-06-20 1986-05-02 Hitachi Ltd Semiconductor integrated circuit device
JPS61154149A (en) * 1984-12-27 1986-07-12 Fujitsu Ltd Semiconductor device and manufacture thereof
JPS61268043A (en) * 1985-05-23 1986-11-27 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture thereof
JPS6218040A (en) * 1985-07-17 1987-01-27 Matsushita Electronics Corp Flattening of phosphosilicate glass film
JPS63124448A (en) * 1986-11-13 1988-05-27 Fujitsu Ltd Manufacture of semiconductor device
US6514876B1 (en) 1999-09-07 2003-02-04 Steag Rtp Systems, Inc. Pre-metal dielectric rapid thermal processing for sub-micron technology

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