JPS5784134A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

Info

Publication number
JPS5784134A
JPS5784134A JP15993380A JP15993380A JPS5784134A JP S5784134 A JPS5784134 A JP S5784134A JP 15993380 A JP15993380 A JP 15993380A JP 15993380 A JP15993380 A JP 15993380A JP S5784134 A JPS5784134 A JP S5784134A
Authority
JP
Japan
Prior art keywords
film
semiconductor substrate
layers
silicon oxide
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15993380A
Other languages
Japanese (ja)
Other versions
JPS6231815B2 (en
Inventor
Shigeru Honjo
Shoichi Kitane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15993380A priority Critical patent/JPS5784134A/en
Publication of JPS5784134A publication Critical patent/JPS5784134A/en
Publication of JPS6231815B2 publication Critical patent/JPS6231815B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To shorten the manufacturing hours and to enhance yield of product of a semiconductor substrate by a method wherein a means to form a three layers mutliple film of a silicon oxide film, a polycrysalline silicon film, a silicon nitride film on both surfaces of the semiconductor substrate is provided. CONSTITUTION:A means to etch chemically only one side of deposition layers 6 formed on both the surfaces of the semiconductor substrate 5, and to form the three layers multiple film 10 consisting of the silicon oxide film 7, the polycrystalline silicon film 8, the silicon nitride film 9 on both surfaces is provided. The multiple film 1 thereof has the larger masking effect as compared with a silicon oxide film having the same thickness, and prevents infiltration of phosphorus existing in the deposition layer 6 into the main surface on the opposite side. Then slumping is performed on the substrate wafer 11 formed with the three layers multiple film 10 in an oxidizing atmosphere in pressure stack condition. Then the silicon oxide film 12 being the whole of the three layers converted thermally is dipped in a solution of hydrogen fluoride to be removed, and the prescribed semiconductor substrate 21 and be obtained.
JP15993380A 1980-11-13 1980-11-13 Manufacture of semiconductor substrate Granted JPS5784134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15993380A JPS5784134A (en) 1980-11-13 1980-11-13 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15993380A JPS5784134A (en) 1980-11-13 1980-11-13 Manufacture of semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS5784134A true JPS5784134A (en) 1982-05-26
JPS6231815B2 JPS6231815B2 (en) 1987-07-10

Family

ID=15704316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15993380A Granted JPS5784134A (en) 1980-11-13 1980-11-13 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS5784134A (en)

Also Published As

Publication number Publication date
JPS6231815B2 (en) 1987-07-10

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