JPS62296599A - Composite ceramic multilayer interconnection board and manufacture of the same - Google Patents

Composite ceramic multilayer interconnection board and manufacture of the same

Info

Publication number
JPS62296599A
JPS62296599A JP14096986A JP14096986A JPS62296599A JP S62296599 A JPS62296599 A JP S62296599A JP 14096986 A JP14096986 A JP 14096986A JP 14096986 A JP14096986 A JP 14096986A JP S62296599 A JPS62296599 A JP S62296599A
Authority
JP
Japan
Prior art keywords
layer
glass
composite ceramic
ceramic multilayer
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14096986A
Other languages
Japanese (ja)
Inventor
三森 誠司
上山 守
洋一 町井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP14096986A priority Critical patent/JPS62296599A/en
Publication of JPS62296599A publication Critical patent/JPS62296599A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は混成集積回路などの電子回路部品に用いられる
複合セラミック多層配線板およびその製造法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a composite ceramic multilayer wiring board used for electronic circuit components such as hybrid integrated circuits, and a method for manufacturing the same.

(従来の技術) セラミック配線板にはグリーン法により製造されるセラ
ミック配線板と厚膜法により製造されるセラミック配線
板とがある。最近のセラミック配線板は、高密度化、裏
機症化に伴い、グリーン法によって製造されたセラミッ
ク配線板上に厚膜法により導体層、抵抗体層等を形成し
た複合セラミック多層配線板が一部実用化されている。
(Prior Art) Ceramic wiring boards include ceramic wiring boards manufactured by the green method and ceramic wiring boards manufactured by the thick film method. In recent years, ceramic wiring boards have become more densely packed and more complex, so composite ceramic multilayer wiring boards are produced by forming conductor layers, resistor layers, etc. using the thick film method on ceramic wiring boards manufactured using the green method. Some parts have been put into practical use.

従来の複合セラミック多層配線板は、第3図に示すよう
にアルミナセラミックス1中にMo、W 等の高融点金
属粉を主成分とした内部導体層2を形成し、その内部導
体層2の一部をスルーホール5を介して表面に引出し、
スルーホール5上に露出した内部導体層2の露出面にめ
っきなどの方法でNi層8を形成し、さらにその上面A
uなどの貴金楓層6を形成したものが一般に知られてい
る。
As shown in FIG. 3, a conventional composite ceramic multilayer wiring board has an internal conductor layer 2 mainly composed of powder of a high melting point metal such as Mo or W formed in an alumina ceramic 1. The part is pulled out to the surface through the through hole 5,
A Ni layer 8 is formed on the exposed surface of the internal conductor layer 2 exposed on the through hole 5 by a method such as plating, and then the upper surface A
A material having a precious gold maple layer 6 formed thereon, such as U, is generally known.

(発明が解決しようとする問題点) 第3図に示す複合セラミック多層配線板を用いて電子回
路部品を製造する場合、上面に高温焼成用のAg/Pd
粉を主成分とした外部導体層、 RuO2粉を主成分と
した抵抗体層などの厚膜回路を形成するが、これらの厚
膜回路は通常大気中で焼結されるため内部導体層および
内部導体層の露出面に形成する金属層は酸化しないよう
にすることが必要である。しかしながら上記のような構
造の複合セラミック配線板を用いて800〜950℃の
温度で焼成すると下地の内部導体層および金属層が酸化
される欠点がある。
(Problems to be Solved by the Invention) When manufacturing electronic circuit components using the composite ceramic multilayer wiring board shown in FIG.
Thick film circuits such as an outer conductor layer mainly composed of powder and a resistor layer mainly composed of RuO2 powder are formed, but since these thick film circuits are usually sintered in the atmosphere, the inner conductor layer and internal It is necessary to prevent the metal layer formed on the exposed surface of the conductor layer from oxidizing. However, when a composite ceramic wiring board having the above structure is used and fired at a temperature of 800 to 950 DEG C., there is a drawback that the underlying internal conductor layer and metal layer are oxidized.

この対策として低温焼成(650℃以下)用のAg/P
d粉を主成分とした外部導体層、 RuO2粉を主成分
とした抵抗体層などの厚膜回路を形成したり、キユアリ
ングタイプの導体層、カーボン系の抵抗体層などの厚膜
回路を形成してみたが、これらは高温焼成の厚膜回路に
比較し、TCR(抵抗の変動率)が大きく信頼性に劣る
という欠点がある。
As a countermeasure for this, Ag/P for low temperature firing (below 650℃)
It is possible to form thick film circuits such as an external conductor layer mainly composed of d powder or a resistor layer mainly composed of RuO2 powder, or to form thick film circuits such as a curing type conductor layer or a carbon-based resistor layer. However, compared to thick film circuits fired at high temperatures, these circuits have a disadvantage in that they have a large TCR (resistance variation rate) and are inferior in reliability.

(問題点を解決するための手段) 本発明は上記のような欠点のない複合セラミンク多層配
線板およびその製造法を提供することを目的とするもの
である。
(Means for Solving the Problems) An object of the present invention is to provide a composite ceramic multilayer wiring board and a method for manufacturing the same, which are free from the above-mentioned drawbacks.

本発明者らは上記の欠点について柚々検H・1シた結果
、グリーン法により一部を表面に露出させてアルミナセ
ラミックス中に〜(0,w等の市融点金属粉を主成分と
した内部導体層を形成し、ついでスルーホールを介して
表面に露出した内部導体層−Fにスクリーン印刷法、転
写などの方法でAg/Pd層を形成し、さらにAg/P
d層の表面のほぼ中央部を残しアルミナセラミックスの
表面にカケてガラスペーストを塗布し、中τF雰囲気中
で焼成してバイアホールを有するガラス層を形成したと
ころ800〜950℃の温度で焼成しても下地の内部導
体層およびAg/Pd層が酸化しないことを確認した。
The inventors of the present invention investigated the above-mentioned drawbacks repeatedly, and found that by exposing a part of the surface to the surface using the green method, alumina ceramics containing ~(0, W, etc.) melting point metal powder as the main component. An internal conductor layer is formed, and then an Ag/Pd layer is formed on the internal conductor layer -F exposed to the surface through the through hole by a method such as screen printing or transfer.
A glass paste was chipped onto the surface of the alumina ceramics, leaving approximately the center of the surface of the d layer, and fired in a medium τF atmosphere to form a glass layer with via holes. It was confirmed that the underlying internal conductor layer and Ag/Pd layer were not oxidized even if

本発明は一部を表面に露出させてアルミナセラミミック
スの表面とAg/Pd層上にバイアホールを設けて形成
されたガラス層からなる複合セラミック多層配線板並び
にグリーン法により一部を表面に露出させてアルミナセ
ラミックス中に内部導体層を形成し、ついで内部導体層
の露出面にAg/Pd層を形成し、さらにAg/Pd層
の表面のほぼ中央部を残しアルミナセラミックスの表面
にかけてガラスペーストを塗布し、中性雰囲気中で焼成
してバイアホールを有するガラス層を形成する複合セラ
ミック多層自己線板の製造法に関する。
The present invention relates to a composite ceramic multilayer wiring board consisting of a glass layer formed by providing a via hole on the surface of alumina ceramics and an Ag/Pd layer with a part exposed on the surface, and a part exposed on the surface using the green method. Then, an Ag/Pd layer is formed on the exposed surface of the internal conductor layer, and a glass paste is applied to the surface of the alumina ceramic, leaving approximately the center of the surface of the Ag/Pd layer. The present invention relates to a method for manufacturing a composite ceramic multilayer self-wire plate, which is coated and fired in a neutral atmosphere to form a glass layer having via holes.

本発明において内部導体層を形成する材料としては、M
o、Mo/Mn、W等の高融点金属が用いられる。
In the present invention, the material forming the internal conductor layer is M
High melting point metals such as O, Mo/Mn, and W are used.

Ag/Pd層の形成は、転写により形成する方法。The Ag/Pd layer is formed by transfer.

Ag/Pdペーストを塗布し、熱処理により焼付けて形
成する方法などかあシ特に制限はないが9本発明ではA
g/Pdペーストを塗布し、それを還元又は中性雰囲気
中で熱処理し、Ag/Pdペーストを焼付けて形成する
ことが好オしい。
There are no particular limitations on the method of applying Ag/Pd paste and baking it by heat treatment, but in the present invention, A
Preferably, the Ag/Pd paste is formed by applying a Ag/Pd paste, heat-treating it in a reducing or neutral atmosphere, and baking the Ag/Pd paste.

Ag/Pd層の厚さについては特に制限はないが。There is no particular restriction on the thickness of the Ag/Pd layer.

5〜20μmの厚さであればAg/Pd層にピンホール
がなく1作業性の面で好オしい。
A thickness of 5 to 20 μm is preferable in terms of ease of workability since the Ag/Pd layer has no pinholes.

ガラス層の形成に用いられるガラスは、非晶質ガラス、
結晶化ガラスで中性雰囲気中において焼結可能なガラス
が用いられる。なお軟化点が650℃〜Ag/Pd層の
融点以下のガラスを用いれば。
The glass used to form the glass layer is amorphous glass,
A crystallized glass that can be sintered in a neutral atmosphere is used. Note that if a glass having a softening point of 650° C. to below the melting point of the Ag/Pd layer is used.

厚膜回路形成時にガラスがアルミナセラミックスに拡散
しないので好塘しい。また高融点金属より酸化物の生成
自由エネルギーの高いガラスを用いれば、ガラスが高融
点金属に拡散しても高融点金属が酸化しないので好まし
い。さらに結晶化ガラスは熱処理(800〜850℃)
によってマイクロクラックが生じないガラスを用いるこ
とが好ましい。
This is advantageous because glass does not diffuse into alumina ceramics when forming thick film circuits. Further, it is preferable to use glass which has a higher free energy of oxide formation than the high melting point metal because the high melting point metal will not be oxidized even if the glass diffuses into the high melting point metal. Furthermore, crystallized glass is heat treated (800-850℃)
It is preferable to use glass that does not cause microcracks.

ガラスペーストを焼付けるには、N2HAr等の中性雰
囲気中で焼成しなければならず、酸化性ず囲気中で焼成
すると内部導体層等が酸化1〜.また還元性雰囲気中で
焼成するとガラスペースト中の有機バインダーが残存し
てガラスの焼結を妨げるという欠点が生じる。
To bake the glass paste, it must be baked in a neutral atmosphere such as N2HAr, and if it is baked in a non-oxidizing atmosphere, the internal conductor layer etc. will be oxidized to 1~1. Furthermore, when fired in a reducing atmosphere, the organic binder in the glass paste remains and hinders the sintering of the glass.

本発明になる複合セラミック多層配線板は、必要に応じ
バイアホールおよびバイアホール周辺のガラス層上にガ
ラスを含有したAg / P d + Ag /P t
 −Pt+ Au等を主成分とした外部導体層+RuO
□を主成分とした抵抗体層などの厚膜回路を形成しても
よい。
The composite ceramic multilayer wiring board according to the present invention includes Ag/P d + Ag/P t containing glass on the via hole and the glass layer around the via hole as necessary.
-Pt+ Outer conductor layer mainly composed of Au etc.+RuO
A thick film circuit such as a resistor layer containing □ as a main component may be formed.

(実施例) 以下実施例により本発明を説明する。(Example) The present invention will be explained below with reference to Examples.

実施例1 厚さ0.8 annのアルミナセラミックグリーンシー
ト(アルミナ純度96重量%)(以下グリーンシートと
いう)を2枚50X50a++nの寸法に切断し。
Example 1 Two alumina ceramic green sheets (alumina purity 96% by weight) (hereinafter referred to as green sheets) having a thickness of 0.8 ann were cut into a size of 50×50a++n.

このうちの1枚に直径0.6.の穴(スルーホール)を
形成し2次いでスルーホール内にWペースト(旭化学社
製、商品名3TW−1200)を充填すると共に片側の
表面に前述と同じWペーストを印刷し、そして乾燥後他
の1枚のグリーンシートの上に前記グリーンシートの表
面にWペーストを印刷した面を下にして重ね、それを1
00℃、61(g/Ca1l”の条件で加熱加圧し、そ
の後弱還元性()−Tz)雰囲気中で1600℃の温度
で1時間保持してグリーンシートを焼結させると共にW
ペーストを焼結させ第2図に示すように一部を表面に露
出させてアルミナセラミックス1中に内部導体層2を形
成したセラミック配線板を得た。
One of these has a diameter of 0.6. 2. Next, fill the through hole with W paste (manufactured by Asahi Kagaku Co., Ltd., product name 3TW-1200), print the same W paste as above on one surface, and after drying, paste on the other side. Place the above green sheet on top of one green sheet with the side with the W paste printed on it facing down.
The green sheet was heated and pressed under the conditions of 00°C and 61 (g/Ca1l), and then held at a temperature of 1600°C for 1 hour in a weakly reducing ()-Tz) atmosphere to sinter the green sheet and W.
The paste was sintered to obtain a ceramic wiring board in which internal conductor layer 2 was formed in alumina ceramics 1 with a portion exposed on the surface as shown in FIG.

次に上記内部導体層2の妬出面の中央部に、平均粒径が
0.3μmのAg粉80重量%とPd粉20重量係とを
混合し、この混合物100重量部に対し、アクリル系バ
インダー(デュポン社製、商品名◆5200)2重量部
および有機溶剤としてα−テルピネオールを20重量部
添加し、3本ロールにて混練して得たAg/Pdペース
トを直径が0.4mm、熱処理後の厚さが10μmの厚
さになるように印刷し、乾燥後還元雰囲気中で750℃
の温度で10分間熱処理してAg/Pd層3を形成した
Next, 80% by weight of Ag powder with an average particle size of 0.3 μm and 20% by weight of Pd powder were mixed in the center of the protruding surface of the internal conductor layer 2, and 100 parts by weight of this mixture was mixed with an acrylic binder. (manufactured by DuPont, trade name ◆5200) and 20 parts by weight of α-terpineol as an organic solvent were added, and the Ag/Pd paste obtained by kneading with three rolls was heated to a diameter of 0.4 mm. Printed to a thickness of 10 μm and dried at 750°C in a reducing atmosphere.
The Ag/Pd layer 3 was formed by heat treatment at a temperature of 10 minutes.

この後5ins 50重量% t Ba024重量%。After this, 5ins 50% by weight t Ba024% by weight.

A/gOs 6重量%およびCa020重トチよシなる
軟化点が860℃のガラスを平均粒径3μmに粉砕し、
この粉砕したガラス粉末100重量8部に対し、アクリ
ル系バインダー(デュポン社製、商品名す5200)2
重量部および有機溶剤とじてブチルカルピトールアセテ
ートを10重量部添加し、3本ロールにて混練してペー
スト化した。次に前記のガラスペーストを、 Ag/P
d層3上の中央部を直径0.2 mm残し、アルミナセ
ラミックス1の表面Kかけて幅が0.4amのリング状
に、そして乾燥後の厚さが40μmの厚さになるように
印刷し、乾燥後N2雰囲気で900℃の温度で20分間
熱処理してガラス層4およびバイアホール7を形成した
複合セラミック多層配線板を得た。なお第1図および第
2図において5はスルーホールである。
Glass having a softening point of 860°C and containing 6% A/gOs and Ca020 was ground to an average particle size of 3 μm,
To 100 parts by weight of this pulverized glass powder, 2 parts of acrylic binder (manufactured by DuPont, trade name: 5200)
10 parts by weight of butylcarpitol acetate (including parts by weight and organic solvent) were added, and the mixture was kneaded with three rolls to form a paste. Next, the glass paste was mixed with Ag/P
Leave a diameter of 0.2 mm in the center on the d layer 3, and print over the surface K of the alumina ceramic 1 in a ring shape with a width of 0.4 am, and a thickness of 40 μm after drying. After drying, the composite ceramic multilayer wiring board was heat-treated at a temperature of 900° C. for 20 minutes in an N2 atmosphere to obtain a composite ceramic multilayer wiring board in which a glass layer 4 and via holes 7 were formed. Note that in FIGS. 1 and 2, 5 is a through hole.

実施例2 実施例1で得たセラミック配線板の内部露出面に実施例
1と同様の方法で厚さ10μmのAg/Pd層を形成し
た。この後5lOa54重量係。
Example 2 A 10 μm thick Ag/Pd layer was formed on the internally exposed surface of the ceramic wiring board obtained in Example 1 in the same manner as in Example 1. After this, 5lOa54 weight section.

AI!*os  13重量’l=、 Zn07重量%、
Ca025重量係およびMgO1重量%よりなる軟化点
が820℃のガラスを平均粒径3μmに粉砕し、この粉
砕したガラス粉末100重量部に対し、アクリル系バイ
ンダー(デュポン社製、商品名ナ5200)2重量部お
よび有機溶剤としてブチルカルピトールアセテートを1
0重量部添加し、3本ロールにて混練してペースト化1
〜だ。次に前dピのガラスペーストを実施例1と同様の
方法で。
AI! *os 13wt'l=, Zn07wt%,
A glass with a softening point of 820° C. consisting of Ca025 weight percent and MgO 1 weight percent was ground to an average particle size of 3 μm, and 2 parts of an acrylic binder (manufactured by DuPont, trade name Na 5200) was added to 100 parts by weight of this ground glass powder. 1 part by weight and 1 part by weight of butylcarpitol acetate as an organic solvent.
Add 0 parts by weight and knead with 3 rolls to make paste 1
~is. Next, apply the glass paste from the previous step in the same manner as in Example 1.

Ag/Pd層上の中央部を直径0.3 mm残1〜.ア
ルミナセラミックスの表面にかけて幅が0.6rrrm
のリング状に、そして乾燥後の厚さが50μmの厚さに
なるように印刷し、乾燥後Nm雰囲気中で850℃の温
度で10分間熱処理してガラス層およびバイアホールを
形成した複合セラミック多層配線板を得た。
The central part on the Ag/Pd layer has a diameter of 0.3 mm remaining. Width is 0.6rrrm across the surface of alumina ceramics
The composite ceramic multilayer was printed in a ring shape with a thickness of 50 μm after drying, and after drying was heat-treated at a temperature of 850°C for 10 minutes in a Nm atmosphere to form a glass layer and a via hole. I got a wiring board.

実施例3 実施例1で得たセラミック配線板の内部露出面に実施例
1と同様の方法で厚さ20μmのAg/Pd層を形成し
た。この後Ca系の多層用ガラスペースト(日量フェロ
電子社製、商品名1005 RCu)を実施例1と同様
の方法で、かつ実施例1と同形状に、そして乾燥後の厚
さが30μmの厚さになるように印刷し、乾燥gNmW
N気中で850℃の温度で1時間熱処理してガラス層お
よびパイアホ−ルを形成した複合セラミック多層配線板
を得た。
Example 3 A 20 μm thick Ag/Pd layer was formed on the internally exposed surface of the ceramic wiring board obtained in Example 1 in the same manner as in Example 1. After that, a Ca-based multilayer glass paste (manufactured by Nichiryo Ferro Denshi Co., Ltd., trade name 1005 RCu) was applied in the same manner as in Example 1, in the same shape as in Example 1, and with a thickness of 30 μm after drying. Print to the desired thickness and dry gNmW
A composite ceramic multilayer wiring board in which a glass layer and a via hole were formed was obtained by heat treatment at a temperature of 850 DEG C. for 1 hour in N air.

比較例1 実施例1で得たセラミック配線板の内部導体層の露出面
に実施例1と同様の方法および実施例1と同様のめつき
液を用いて厚さ4μmのNiめつき層を形成し、さらに
その上面に無電解Auめつき(日本エンゲルハルト社製
、商品名ATOMEX−PC)を行ない、水洗、乾燥し
て厚さ1μmのAuめつき層を形成した複合セラミック
多層配線板を得た。
Comparative Example 1 A Ni plating layer with a thickness of 4 μm was formed on the exposed surface of the internal conductor layer of the ceramic wiring board obtained in Example 1 using the same method and using the same plating solution as in Example 1. Then, electroless Au plating (manufactured by Nippon Engelhard Co., Ltd., trade name: ATOMEX-PC) was performed on the top surface, followed by washing with water and drying to form a 1 μm thick Au plating layer to obtain a composite ceramic multilayer wiring board. Ta.

次に各実施例で得た複合セラミック多層配線板のバイア
ホール内とバイアホール周辺のガラス層上および比較例
1で得た複合セラミック多層配線板のAuめつき層上に
高温焼成型のガラス含有Ag/Pdペースト(日中マツ
セイ社製、商品名÷4846)を印刷し、乾燥後大気中
で850℃の温度で10分間熱処理してガラス含有Ag
/Pdペーストを焼付け、ガラス含有Ag/Pd層を形
成した。次いでこのガラス含有Ag/Pd層と内部導体
層との接続抵抗および内部導体層の酸化の有無について
観察した。その結果各実施例で得た複合セラミック多層
配線板は、接続抵抗は1mΩ以下で変動率が小さく、内
部導体層の酸化は見られなかった。これに対し比較例1
で得た複合セラミック多層配線板は、¥1に気的導通が
得られず、内部導体層が酸化していた。またガラス含有
Ag/Pd層の代わりにガラス含有Pt層、ガラス含有
Au層、ガラス含有Ag/Pt層を形成しても同様の効
果が得られた。
Next, high temperature sintered glass was added to the inside of the via hole and on the glass layer around the via hole of the composite ceramic multilayer wiring board obtained in each example, and on the Au plating layer of the composite ceramic multilayer wiring board obtained in Comparative Example 1. Ag/Pd paste (manufactured by Nichika Matsusei Co., Ltd., trade name ÷4846) was printed, and after drying, it was heat-treated in the air at a temperature of 850°C for 10 minutes to form glass-containing Ag.
/Pd paste was baked to form a glass-containing Ag/Pd layer. Next, the connection resistance between the glass-containing Ag/Pd layer and the internal conductor layer and the presence or absence of oxidation of the internal conductor layer were observed. As a result, the composite ceramic multilayer wiring boards obtained in each example had a connection resistance of 1 mΩ or less with a small fluctuation rate, and no oxidation of the internal conductor layer was observed. On the other hand, comparative example 1
In the composite ceramic multilayer wiring board obtained in 1, gas conduction could not be obtained and the internal conductor layer was oxidized. Similar effects were also obtained by forming a glass-containing Pt layer, a glass-containing Au layer, or a glass-containing Ag/Pt layer instead of the glass-containing Ag/Pd layer.

(発明の効果) 本発明になる複合セラミック多層配線板は、内部導体層
が酸化せず、電気的特性上信頼が高く。
(Effects of the Invention) In the composite ceramic multilayer wiring board according to the present invention, the internal conductor layer does not oxidize and has high reliability in terms of electrical characteristics.

工業的に極めて好適である。It is extremely suitable industrially.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例になる被合セラミック多層配線
板の断面側面図、第2図は本発明の実施例になる複合セ
ラミック多層配線板に用いられるセラミック配線板の断
面側面図および第3図は従来の複合セラミック多層配線
板の断面側面図である。 符号の説明 1・・・アルミナセラミックス 2・・・内部導体層3
・・・Ag/Pd 層4・・・ガラス層5・・・スルー
ホール    6・・・貴金属層7・・・バイアホール
    8・・・Ni層ろ 釆 2 図 第32
FIG. 1 is a cross-sectional side view of a ceramic multilayer wiring board to be mated according to an embodiment of the present invention, and FIG. 2 is a cross-sectional side view of a ceramic wiring board used in a composite ceramic multilayer wiring board according to an embodiment of the present invention. FIG. 3 is a cross-sectional side view of a conventional composite ceramic multilayer wiring board. Explanation of symbols 1...Alumina ceramics 2...Inner conductor layer 3
...Ag/Pd layer 4...Glass layer 5...Through hole 6...Precious metal layer 7...Via hole 8...Ni layer filter 2 Fig. 32

Claims (1)

【特許請求の範囲】 1、一部を表面に露出させてアルミナセラミックス中に
内蔵された内部導体層、前記内部導体層の露出面に形成
されたAg/Pd層およびアルミナセラミックスの表面
とAg/Pd層上にバイアホールを設けて形成されたガ
ラス層からなる複合セラミック多層配線板。 2、グリーン法により一部を表面に露出させてアルミナ
セラミックス中に内部導体層を形成し、ついで内部導体
層の露出面にAg/Pd層を形成し、さらにAg/Pd
層の表面のほぼ中央部を残しアルミナセラミックスの表
面にかけてガラスペーストを塗布し、中性雰囲気中で焼
成してバイアホールを有するガラス層を形成することを
特徴とする複合セラミック多層配線板の製造法。
[Claims] 1. An internal conductor layer built into alumina ceramics with a part exposed on the surface, an Ag/Pd layer formed on the exposed surface of the internal conductor layer, and an Ag/Pd layer formed on the surface of the alumina ceramics. A composite ceramic multilayer wiring board consisting of a glass layer formed by providing via holes on a Pd layer. 2. Form an internal conductor layer in alumina ceramics by exposing a part to the surface using the green method, then form an Ag/Pd layer on the exposed surface of the internal conductor layer, and then form an Ag/Pd layer on the exposed surface of the internal conductor layer.
A method for producing a composite ceramic multilayer wiring board characterized by applying glass paste to the surface of alumina ceramics leaving approximately the center of the surface of the layer and firing in a neutral atmosphere to form a glass layer having via holes. .
JP14096986A 1986-06-17 1986-06-17 Composite ceramic multilayer interconnection board and manufacture of the same Pending JPS62296599A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14096986A JPS62296599A (en) 1986-06-17 1986-06-17 Composite ceramic multilayer interconnection board and manufacture of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14096986A JPS62296599A (en) 1986-06-17 1986-06-17 Composite ceramic multilayer interconnection board and manufacture of the same

Publications (1)

Publication Number Publication Date
JPS62296599A true JPS62296599A (en) 1987-12-23

Family

ID=15281041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14096986A Pending JPS62296599A (en) 1986-06-17 1986-06-17 Composite ceramic multilayer interconnection board and manufacture of the same

Country Status (1)

Country Link
JP (1) JPS62296599A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368195A (en) * 1989-08-05 1991-03-25 Nippondenso Co Ltd Laminated ceramic board and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368195A (en) * 1989-08-05 1991-03-25 Nippondenso Co Ltd Laminated ceramic board and manufacture thereof

Similar Documents

Publication Publication Date Title
JP3331083B2 (en) Low temperature firing ceramic circuit board
JPS6166303A (en) Conductive paste for thick film
JPH0213803B2 (en)
JPS62296599A (en) Composite ceramic multilayer interconnection board and manufacture of the same
JPS62296600A (en) Composite ceramic multilayer interconnection board and manufacture of the same
JP2001298255A (en) Method of manufacturing thick printed board
JPH02277279A (en) Simultaneously baked ceramic circuit board
JPS6029240B2 (en) Ceramic circuit board manufacturing method
JPH01138792A (en) Ceramic multilayer circuit substrate
JPS6092697A (en) Composite laminated ceramic part
JPH06104567A (en) Method for generation of bonding layer of metal interconnection on ceramic substrate
JPS62166594A (en) Composite ceramic multilayer wiring substrate and manufacture of the same
JP3093602B2 (en) Manufacturing method of ceramic circuit board
JPH02129997A (en) Manufacture of multilayer ceramic circuit substrate
JP2760542B2 (en) Manufacturing method of ceramic circuit board
JPH05347484A (en) Via formation paste and via formation method
JPS63186492A (en) Manufacture of circuit board
JPS61292392A (en) Manufacture of ceramic wiring board
JPS58207698A (en) Hybrid integrated circuit board
JPH0783180B2 (en) Ceramic multilayer substrate and manufacturing method thereof
JPH0321109B2 (en)
JPH0554718B2 (en)
JPH01321692A (en) Manufacture of ceramic multilayer substrate
JPH0253951B2 (en)
JPH0213478B2 (en)