JPS62274794A - Method of assembly of electronic circuit board - Google Patents

Method of assembly of electronic circuit board

Info

Publication number
JPS62274794A
JPS62274794A JP61118679A JP11867986A JPS62274794A JP S62274794 A JPS62274794 A JP S62274794A JP 61118679 A JP61118679 A JP 61118679A JP 11867986 A JP11867986 A JP 11867986A JP S62274794 A JPS62274794 A JP S62274794A
Authority
JP
Japan
Prior art keywords
circuit board
positioning
image
electronic circuit
television camera
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61118679A
Other languages
Japanese (ja)
Inventor
池田 連也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61118679A priority Critical patent/JPS62274794A/en
Publication of JPS62274794A publication Critical patent/JPS62274794A/en
Pending legal-status Critical Current

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  • Supply And Installment Of Electrical Components (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 3、発明の詳細な説明 (産業上の利用分野) 本発明は、プリント基板に平面実装用ICを搭載する方
法に関し、特に、例えば40本を越えるような、多数で
微細なリードを有する平面実装用ICを正確l/c位置
決めして搭載する電子回路基板組立方法に関する。
Detailed Description of the Invention 3. Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a method for mounting flat-mount ICs on a printed circuit board, and particularly relates to a method for mounting flat-mount ICs on a printed circuit board. The present invention relates to an electronic circuit board assembly method for accurately positioning and mounting a flat surface mounting IC having fine leads.

(従来捜術) 従来、この種のICの搭載時の位置決めを、画像認識を
使って行なう場合、ICの形状の特徴が曳くあられれる
ような領域を数個所選び、拡大した画像により、微細な
位置決めを行っていた。第3図はICの1例を示す平面
図である。ICIに対して領域6 、7 、8t−設定
してこの部分の拡大画像を写し出す。第4図はテレビカ
メラによる領域6の部分の画像を示したものである。こ
の画像を適当なしきい値を与えて2値化すれば、光の反
射率の高いリード2は白く、他の部分は黒くなり、第4
図に示したのと同様な画像が得られる。ここでさらに狭
い領域9,9′を設定し、その中での黒白の比率を正常
な場合と比較することにより、微細な位置のずれを検出
することができる。
(Conventional search technique) Conventionally, when positioning this type of IC when it is mounted, using image recognition, several areas where the characteristics of the IC's shape can be seen are selected, and the enlarged image is used to detect minute details. I was positioning. FIG. 3 is a plan view showing one example of the IC. Regions 6, 7, and 8t are set for the ICI, and an enlarged image of these portions is projected. FIG. 4 shows an image of area 6 taken by a television camera. If this image is binarized by giving an appropriate threshold, the lead 2 with high light reflectance will be white, the other parts will be black, and the 4th lead will be white.
An image similar to that shown in the figure is obtained. By setting narrower areas 9 and 9' and comparing the black and white ratio therein with the normal case, it is possible to detect minute positional deviations.

(発明が解決しようとする問題点) しかしながらこの従来方法による位置決めは、例えば第
3図の領域6の代りに第5図の領域6′を見てい念とし
ても第4図と同様な画像が得られ、結果として、リード
1本分だけずれ念位置に位置決めされてしまい、正しい
位置決めができないという欠点があつ念。
(Problem to be Solved by the Invention) However, in positioning using this conventional method, an image similar to that shown in FIG. 4 cannot be obtained even if the area 6' in FIG. 5 is looked at instead of the area 6 in FIG. As a result, the position is misaligned by one lead, and there is a drawback that correct positioning cannot be performed.

(問題点を解決するための手段) 本発明の電子回路基板の組立方法は、正確な位置決めを
行うために、テレビカメラによりIC全体を写してその
画像認識により粗い位置決めを行った後、さらKICの
一部分を写し出して微細な位置決め?行うようにするこ
とにより、上記欠点をなくしたものである。
(Means for Solving the Problems) In order to perform accurate positioning, the method for assembling an electronic circuit board of the present invention involves photographing the entire IC using a television camera, performing rough positioning through image recognition, and then Fine positioning by showing a part of the image? By doing so, the above drawbacks can be eliminated.

(実施例) 次に、本発明について、図面を参照して実施例につき説
明する。
(Examples) Next, examples of the present invention will be described with reference to the drawings.

第1図は本発明の1実施例く係る基板組立方法を説明す
るための構成図である。真空吸着ノズル5により保持さ
れたICIの下方に、2台のテレビカメラ3,4が設置
され、1台のテレビカメラ3はIC全体がその視野内に
入るように、もう1台のテレビカメラ4はICIのリー
ド2の一部が視野内に入るようにそれぞれ調整されてい
る。
FIG. 1 is a block diagram for explaining a substrate assembly method according to an embodiment of the present invention. Two television cameras 3 and 4 are installed below the ICI held by the vacuum suction nozzle 5, and one television camera 3 is connected to the other television camera 4 so that the entire IC is within its field of view. are adjusted so that a portion of the ICI lead 2 is within the field of view.

第2図(&)はテレビカメラ3による画像の一例を示し
免囚である。この画像を適当なしきい値を定めて2値化
すれば、第2図(b)のように反射率の高いリード2は
白く、他の部分は黒く表示される。
FIG. 2 (&) shows an example of an image taken by the television camera 3, showing a prisoner being released. If this image is binarized by setting an appropriate threshold value, the leads 2 with high reflectance will be displayed in white, and the other parts will be displayed in black, as shown in FIG. 2(b).

ここでリードの外接四角形形の寸法、重心の位置および
傾きを調べることにより、粗い位置決めができる。
Rough positioning can be performed by checking the dimensions, center of gravity, and inclination of the circumscribed rectangle of the lead.

次に、テレビカメラ41Cよりリード2の一部を写すと
、第4図と同様の画像が得られ、以下従来技術と同様の
方法で微細な位置決めを行うことができる。また第1図
においてテレビカメラ3として自動焦点機mt−有する
もの、あるいは広範日丸わたって焦点の合うものを使用
すれば、1台のテレビカメラでも、同様の効果が得られ
る。
Next, when a part of the lead 2 is photographed using the television camera 41C, an image similar to that shown in FIG. 4 is obtained, and fine positioning can be performed thereafter in the same manner as in the prior art. Furthermore, if the television camera 3 shown in FIG. 1 is one that has an automatic focusing device mt-, or one that can focus over a wide range of days, the same effect can be obtained with a single television camera.

(発明の効果) 以上説明したように本発明は、まずIC全体が見える視
野で粗い位置決めを行い1次にリードの一部が□見える
視野で微細な位置決めを行うことにより、ICの正確な
位置決めが可能であるという効果がある。
(Effects of the Invention) As explained above, the present invention enables accurate positioning of the IC by first performing rough positioning in a field of view where the entire IC can be seen, and then performing fine positioning in a field of view where part of the lead can be seen. This has the effect that it is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例の組立方法を説明する九めの
構成図、第2図(a)はテレビカメラによる画像の一例
を示す図、第2図中)は別のテレビカメ?による画像の
一例を示す図、第3図はICの一例を示す平面図、第4
図はテレビカメラによる画像の一例を示す図、第5図は
ICの一部を示す平面図である。 1・・・IC12・・・リード、 3.4・・・テレビカメラ、5・・・真空吸着ノズル。 6.6’、7.8・・・テレビカメラに写す領域。 9.9′・・・微細位置決めに使用する領域。
FIG. 1 is a ninth block diagram explaining the assembly method of an embodiment of the present invention, FIG. 2(a) is a diagram showing an example of an image taken by a television camera, and the image in FIG. FIG. 3 is a plan view showing an example of an IC, and FIG. 4 is a plan view showing an example of an IC.
The figure shows an example of an image taken by a television camera, and FIG. 5 is a plan view showing a part of the IC. 1...IC12...Lead, 3.4...TV camera, 5...Vacuum suction nozzle. 6.6', 7.8... Area photographed by the TV camera. 9.9': Area used for fine positioning.

Claims (1)

【特許請求の範囲】[Claims]  平面実装用ICをプリント基板に搭載する工程で、テ
レビカメラにより前記ICの全体を写してその画像認識
により粗い位置決めを行つた後、前記ICの一部分を写
し出してその画像認識により微細な位置決めを行うこと
を特徴とする電子回路基板の組立方法。
In the process of mounting an IC for flat mounting on a printed circuit board, the entire IC is photographed using a television camera and rough positioning is performed by image recognition, and then a portion of the IC is photographed and fine positioning is performed by image recognition. A method for assembling an electronic circuit board, characterized in that:
JP61118679A 1986-05-23 1986-05-23 Method of assembly of electronic circuit board Pending JPS62274794A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61118679A JPS62274794A (en) 1986-05-23 1986-05-23 Method of assembly of electronic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61118679A JPS62274794A (en) 1986-05-23 1986-05-23 Method of assembly of electronic circuit board

Publications (1)

Publication Number Publication Date
JPS62274794A true JPS62274794A (en) 1987-11-28

Family

ID=14742519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61118679A Pending JPS62274794A (en) 1986-05-23 1986-05-23 Method of assembly of electronic circuit board

Country Status (1)

Country Link
JP (1) JPS62274794A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004468A (en) * 2007-06-20 2009-01-08 Fuji Mach Mfg Co Ltd Component disposal device and component disposal method of component mounting machine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004468A (en) * 2007-06-20 2009-01-08 Fuji Mach Mfg Co Ltd Component disposal device and component disposal method of component mounting machine

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