JPS6225443A - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPS6225443A JPS6225443A JP16400485A JP16400485A JPS6225443A JP S6225443 A JPS6225443 A JP S6225443A JP 16400485 A JP16400485 A JP 16400485A JP 16400485 A JP16400485 A JP 16400485A JP S6225443 A JPS6225443 A JP S6225443A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- lead
- lead terminals
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は混成集積回路装置にかかわり、特に、多数のリ
ード端子を容易に出せるようにした混成集積回路装置に
関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a hybrid integrated circuit device, and particularly to a hybrid integrated circuit device in which a large number of lead terminals can be easily provided.
従来の混成集積回路装置は、絶縁性基板上に、スクリー
ン印刷手法により、導体、抵抗体、誘電体厚膜ペースト
を印刷し、高温空気雰囲気中で焼成して所定の回路パタ
ーンを形成し、その後、トランジスタ、コンデンサ等の
電気部品をはんだ付けして搭載し、リード端子を絶縁性
基板端面にあるリード端子取付用電極に挿入し、はんだ
付けして混成集積回路基板としている。最近は、混成集
積回路装置の高機能化に伴い、リード端子数が増加した
り、スルーホールを利用して両面実装をする等、その高
密度化が図られている。これらの混成集積回路装置にお
けるリード端子の取付構造としては、特開昭５９−３３
８５８号公報、実開昭５９−７２７４５号公報に見られ
るように、混成集積回路基板の２辺にリード端子を別々
に挿入し、その後はんだ付けしたものや、あるいは特開
昭５９−４４８５６号公報に見られるように、該回路基
板の周囲に、リード端子とは別に、特定のジャンパー線
を取り付けているものがある。しかし、これらはいずれ
も、リード端子の接続を同時に行うことができないもの
であり、最近の高密度化した混成集積回路装置のように
、多数のリード端子を出したり、表裏のパターンを接続
したりすることが必要なものでは、工数が増加して、製
造工程の簡略化が図れない等の問題があった。Conventional hybrid integrated circuit devices print conductors, resistors, and dielectric thick film pastes on an insulating substrate using screen printing techniques, and then bake them in a high-temperature air atmosphere to form a predetermined circuit pattern. , transistors, capacitors, and other electrical components are soldered and mounted, and the lead terminals are inserted into the lead terminal attachment electrodes on the end face of the insulating substrate and soldered to form a hybrid integrated circuit board. Recently, as hybrid integrated circuit devices have become more sophisticated, efforts have been made to increase their density by increasing the number of lead terminals and implementing double-sided mounting using through holes. The mounting structure of lead terminals in these hybrid integrated circuit devices is disclosed in Japanese Patent Application Laid-Open No. 59-33.
As seen in Japanese Patent Application Laid-open No. 858 and Japanese Utility Model Application No. 59-72745, lead terminals are inserted separately on two sides of a hybrid integrated circuit board and then soldered, or Japanese Patent Application Laid-open No. 59-44856 As shown in , some circuit boards have specific jumper wires attached to the periphery of the circuit board in addition to the lead terminals. However, with all of these, it is not possible to connect lead terminals at the same time, and as in the case of recent high-density hybrid integrated circuit devices, it is difficult to connect multiple lead terminals or connect patterns on the front and back sides. In the case of products that require additional processing, there are problems such as an increase in the number of man-hours and the inability to simplify the manufacturing process.
本発明の目的は、上記従来技術の欠点を除き、リード端
子を混成集積回路基板の２辺以上に接続したり、該回路
基板の表裏パターンを接続したりすることか同時にでき
、製造効率の向上を図った混成集積回路装置を提供する
ことにある。An object of the present invention is to eliminate the drawbacks of the prior art described above, to simultaneously connect lead terminals to two or more sides of a hybrid integrated circuit board, to connect front and back patterns of the circuit board, and to improve manufacturing efficiency. An object of the present invention is to provide a hybrid integrated circuit device that achieves the following.
本発明は、多数のリード端子を備えたフープ状のリード
フレームを用い、これに混成集積回路基板を搭載し、該
基板のリード端子取付用電極上を一方向から押圧して、
リード端子の接続を行うもので、これによって、該回路
基板の２辺以上からリード端子を同時に引き出したり、
表裏パターンを同時に接続できるように図ったものであ
る。The present invention uses a hoop-shaped lead frame equipped with a large number of lead terminals, mounts a hybrid integrated circuit board on this, and presses the lead terminal mounting electrodes of the board from one direction.
This is used to connect lead terminals, which allows lead terminals to be pulled out from two or more sides of the circuit board at the same time,
This is designed to allow front and back patterns to be connected at the same time.
以下、本発明の実施例を図面に従って説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第１図〜第３図はそれぞれ本発明を実施した混成集積回
路装置の外観を示したものである。このうち、第１図は
、混成集積回路基板ｌの２辺以上に表面接続用リード端
子２を接続した多数のリード端子を備えた装置を示し、
第２図は、混成集積回路基板ｌに表面接続用リード端子
２と裏面接続用リード端子３とを備えた装置を示し、第
３図は、混成集積回路基板１の表裏パターン（図示せず
）を、隣接リード端子を連結して一体とした表裏接続用
一体リード端子４によって接続した装置を示す。1 to 3 each show the appearance of a hybrid integrated circuit device embodying the present invention. Of these, FIG. 1 shows a device equipped with a large number of lead terminals in which surface connection lead terminals 2 are connected to two or more sides of a hybrid integrated circuit board l,
FIG. 2 shows a device in which a hybrid integrated circuit board 1 is provided with front-side connection lead terminals 2 and back-side connection lead terminals 3, and FIG. 3 shows front and back patterns (not shown) of the hybrid integrated circuit board 1. A device is shown in which these are connected by integral lead terminals 4 for connecting front and back sides, which are integrated by connecting adjacent lead terminals.
第４図は、第１図に示す混成集積回路装置を形成するた
めのリードフレーム５の平面図であり、リードフレーム
５の内側に、多数の表面接続用リード端子２と、該リー
ド端子を接続するとき混成集積回路基板（図示せず）を
支持する支持板部６と、混成集積回路装置の放熱特性を
向上させるための放熱板部７とを備えている。第５図は
、第４図の応用例で、第４図ではリードフレーム５の中
央にあった放熱板部７を除外し、支持板部６だけを備え
ているものである。第６図は第５図のＡ−Ａ′断面図で
ある。図において、支持板部６または放熱板部７（ただ
し、第４図に示すリードフレームの場合）の上に混成集
積回路基板（図示せず）を入れ、上方に突出しかつ曲げ
加工された表面接続用リード端子２で該基板を押さえ込
むようになっている。FIG. 4 is a plan view of the lead frame 5 for forming the hybrid integrated circuit device shown in FIG. The hybrid integrated circuit device is provided with a support plate portion 6 for supporting a hybrid integrated circuit board (not shown) and a heat sink portion 7 for improving heat radiation characteristics of the hybrid integrated circuit device. FIG. 5 is an application example of FIG. 4, in which the heat dissipation plate portion 7 located at the center of the lead frame 5 in FIG. 4 is removed, and only the support plate portion 6 is provided. FIG. 6 is a sectional view taken along line AA' in FIG. In the figure, a hybrid integrated circuit board (not shown) is placed on the support plate part 6 or the heat sink part 7 (in the case of the lead frame shown in FIG. 4), and the surface connection is protruded upward and bent. The board is held down by the lead terminals 2.
第７図は、第２図に示す混成集積回路装置を形成するた
めのリードフレーム５の平面図、第８図はそのＢ −Ｂ
’断面図であり、多数の表面接続用リード端子２と、曲
げ加工のない裏面接続用リード端子３と、支持板部６お
よび放熱板部７とを備えている。FIG. 7 is a plan view of the lead frame 5 for forming the hybrid integrated circuit device shown in FIG. 2, and FIG.
1 is a cross-sectional view, and includes a large number of front-side connection lead terminals 2, back-side connection lead terminals 3 without bending, a support plate part 6, and a heat sink part 7.
また、第９図は、第３図に示す混成集積回路装置を形成
するためのリードフレーム５の平面図、第１０図はその
ｃ−ｃ’断面図であり、多数の表面接続用リード端子２
と、該リード端子に隣接しかつ回路基板のリード端子取
付用電極位置に対応した表裏接続用一体リード端子４と
、裏面接続用リード端子３と、支持板部６および放熱板
部７とを備えている。Further, FIG. 9 is a plan view of the lead frame 5 for forming the hybrid integrated circuit device shown in FIG.
, an integrated lead terminal 4 for connecting the front and back sides adjacent to the lead terminal and corresponding to the position of the electrode for attaching the lead terminal on the circuit board, a lead terminal 3 for connecting the back side, a support plate part 6 and a heat sink part 7. ing.
次に、本発明による混成集積回路装置の製法について述
べる。第１１図は製造工程の説明図である。Next, a method for manufacturing a hybrid integrated circuit device according to the present invention will be described. FIG. 11 is an explanatory diagram of the manufacturing process.
リードフレーム５は表面接続用リード端子２および裏面
接続用リード端子３を備え、フープ状で加工されており
、材質としてはリン青銅、Ｆｅ−Ｎｉ合金等を使い、公
知の技術であるプレス加工によって所定パターンに抜き
、曲げ加工を行い、その後、厚さ２〜５μｍの銅めっき
、厚さ３〜７μｍのはんだめっきを行い、第１１図（ａ
）に示す断面構成とする。混成集積回路基板１の取付け
は、表面接続用リード端子２を押し上げ（同図（ｂ））
、支持板部６あるいは放熱板部７の上に前記回路基板１
を入れ、ばね性を備えた表面接続用リード端子２と裏面
接続用リード端子３とではさみ込む。その後、リード端
子接続部をレーザあるいは熱風加熱方式により矢印方向
から加熱し、混成集積回路基板１のリード端子取付用電
極上に形成されているはんだ８を溶融させてはんだ付は
接続する（同図（Ｃ）および（ｄ））。その後、混成集
積回路基板１の全体を、耐湿向上、外力保護を兼ねて、
エポキシ系の樹脂って被覆しく同図（ｅ））、必要な前
記リード端子の抜き、曲げ加工を行って、混成集積回路
装置とする（同図（ｆ））。The lead frame 5 has lead terminals 2 for surface connection and lead terminals 3 for back surface connection, and is processed into a hoop shape, using phosphor bronze, Fe-Ni alloy, etc. as the material, and is formed by press processing, which is a known technique. It is punched into a predetermined pattern, bent, and then plated with copper to a thickness of 2 to 5 μm and solder to a thickness of 3 to 7 μm.
) has the cross-sectional configuration shown. To install the hybrid integrated circuit board 1, push up the surface connection lead terminals 2 ((b) in the same figure).
, the circuit board 1 is placed on the support plate part 6 or the heat sink part 7.
and sandwich it between the surface connection lead terminal 2 and the back surface connection lead terminal 3 which have spring properties. Thereafter, the lead terminal connection area is heated in the direction of the arrow using a laser or hot air heating method to melt the solder 8 formed on the lead terminal attachment electrodes of the hybrid integrated circuit board 1 and connect by soldering. (C) and (d)). After that, the entire hybrid integrated circuit board 1 is cleaned to improve moisture resistance and protect it from external forces.
The epoxy resin is used for coating (FIG. 1(e)), and the necessary lead terminals are removed and bent to form a hybrid integrated circuit device (FIG. 4(f)).
本発明によれば、フープ状のリードフレーム内に、混成
集積回路基板と接続するための表面接続用、裏面接続用
の各リード端子および表裏接続用一体リード端子を種々
の組み合わせで設けることにより、回路基板の２辺以上
からリード端子を出した高機能混成集積回路装置や、表
裏パターンの接続を容易にできる高密度混成集積回路装
置を、容易にかつ量産に適した製法で得ることができる
。According to the present invention, by providing various combinations of lead terminals for front surface connection, back surface connection, and integrated lead terminals for front and back connection for connection to a hybrid integrated circuit board in a hoop-shaped lead frame, High-performance hybrid integrated circuit devices with lead terminals extending from two or more sides of a circuit board and high-density hybrid integrated circuit devices that can easily connect front and back patterns can be easily obtained using a manufacturing method suitable for mass production.
第１図〜第３図はそれぞれ本発明による混成集積回路装
置の実施例の外観を示す斜視図、第１図〜第３図図は上
記実施例で用いるリードフレームの平面図および断面図
、第１１図は該実施例の製造工程説明図である。
符号の説明
１・・・混成集積回路基板
２・・・表面接続用リード端子
３・・・裏面接続用リード端子
４・・・表裏接続用一体リード端子
５・・・リードフレーム
６・・・支持板部
７・・・放熱板部
８・・・はんだ
９・・・樹脂1 to 3 are perspective views showing the external appearance of an embodiment of a hybrid integrated circuit device according to the present invention, respectively. FIG. 11 is an explanatory diagram of the manufacturing process of this example. Explanation of symbols 1...Mixed integrated circuit board 2...Lead terminal for front surface connection 3...Lead terminal for back surface connection 4...Integrated lead terminal for front and back connection 5...Lead frame 6...Support Plate part 7...Radiation plate part 8...Solder 9...Resin
Claims (4)
回路を形成し、その後電気部品を搭載してなる混成集積
回路基板に、その２辺以上においてリード端子を接続し
て構成される混成集積回路装置において、前記混成集積
回路基板上のリード端子取付用電極に対応する位置にそ
れぞれリード端子を備えたフープ状のリードフレームを
用い、該リードフレーム上に前記混成集積回路基板を載
置し、前記リード端子取付用電極上を一方向から押圧し
て、これと前記リードフレームのリード端子とを接続し
たことを特徴とする混成集積回路装置。(1) A circuit is formed using conductor, resistor, and dielectric materials on an insulating substrate, and then lead terminals are connected to two or more sides of the hybrid integrated circuit board on which electrical components are mounted. In the hybrid integrated circuit device, a hoop-shaped lead frame is provided with lead terminals at positions corresponding to electrodes for attaching lead terminals on the hybrid integrated circuit board, and the hybrid integrated circuit board is mounted on the lead frame. A hybrid integrated circuit device, characterized in that the lead terminal mounting electrode is placed on the lead terminal and the lead terminal attachment electrode is pressed from one direction to connect the lead terminal of the lead frame.
回路基板の裏面で接続できるようにしたリード端子を含
むことを特徴とする特許請求の範囲第１項に記載の混成
集積回路装置。(2) The hybrid integrated circuit device according to claim 1, wherein the plurality of lead terminals of the lead frame include lead terminals that can be connected on the back side of the hybrid integrated circuit board.
ド端子間で混成集積回路基板の表面と裏面とを同時に接
続できるようにしたリード端子を含むことを特徴とする
特許請求の範囲第１項に記載の混成集積回路装置。(3) According to claim 1, the plurality of lead terminals of the lead frame include lead terminals that are capable of simultaneously connecting the front and back surfaces of the hybrid integrated circuit board between adjacent lead terminals. The hybrid integrated circuit device described.
位置に、混成集積回路基板の部品搭載側と反対側の面と
接触できる放熱板部を備えたことを特徴とする特許請求
の範囲第１項ないし第３項のいずれか１項に記載の混成
集積回路装置。(4) Claim 1, characterized in that the lead frame is provided with a heat dissipation plate portion located inside the lead terminals and capable of contacting the surface of the hybrid integrated circuit board opposite to the component mounting side. The hybrid integrated circuit device according to any one of Items 1 to 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16400485A JPS6225443A (en) | 1985-07-26 | 1985-07-26 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16400485A JPS6225443A (en) | 1985-07-26 | 1985-07-26 | Hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6225443A true JPS6225443A (en) | 1987-02-03 |
| JPH0587020B2 JPH0587020B2 (en) | 1993-12-15 |
Family
ID=15784929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16400485A Granted JPS6225443A (en) | 1985-07-26 | 1985-07-26 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6225443A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0745774A (en) * | 1993-07-31 | 1995-02-14 | Nec Corp | Hybrid integrated circuit device |
| JP2000252397A (en) * | 1999-03-03 | 2000-09-14 | Kitani Denki Kk | Press component for electric apparatus |
-
1985
- 1985-07-26 JP JP16400485A patent/JPS6225443A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0745774A (en) * | 1993-07-31 | 1995-02-14 | Nec Corp | Hybrid integrated circuit device |
| JP2000252397A (en) * | 1999-03-03 | 2000-09-14 | Kitani Denki Kk | Press component for electric apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0587020B2 (en) | 1993-12-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5683566A (en) | Method of manufacting an SMD resistor | |
| JP2504610B2 (en) | Power semiconductor device | |
| JPS6312383B2 (en) | ||
| US20010015286A1 (en) | Method of surface- mounting electronic components | |
| US4164071A (en) | Method of forming a circuit board with integral terminals | |
| JPS6225443A (en) | Hybrid integrated circuit device | |
| JPH0629632A (en) | Printed-circuit board | |
| JP2570336B2 (en) | Hybrid integrated circuit device | |
| JPH07221419A (en) | Hybrid integrated circuit device | |
| JP3549230B2 (en) | Circuit structure and manufacturing method thereof | |
| JP2753767B2 (en) | Substrate for mounting electronic components | |
| JPH0224395B2 (en) | ||
| JPS62282456A (en) | Manufacture of hybrid ic | |
| JP2562797Y2 (en) | Wiring board | |
| JP2743524B2 (en) | Hybrid integrated circuit device | |
| JP2001217279A (en) | High density mounter | |
| JPH0710516Y2 (en) | Hybrid integrated circuit board module | |
| JPS62179794A (en) | Electric circuit wiring board | |
| JPH0735404Y2 (en) | Semiconductor device | |
| JPH0615269U (en) | Lead array for hybrid integrated circuit device | |
| JPS62208691A (en) | Double-sided mounting hybrid integrated circuit | |
| JPS60256217A (en) | Surface wave filter | |
| JPS6125239B2 (en) | ||
| JPH03255691A (en) | Printed wiring board | |
| JPH04249078A (en) | Terminal device of printed circuit board |