JPS6225211B2 - - Google Patents

Info

Publication number
JPS6225211B2
JPS6225211B2 JP57045910A JP4591082A JPS6225211B2 JP S6225211 B2 JPS6225211 B2 JP S6225211B2 JP 57045910 A JP57045910 A JP 57045910A JP 4591082 A JP4591082 A JP 4591082A JP S6225211 B2 JPS6225211 B2 JP S6225211B2
Authority
JP
Japan
Prior art keywords
scan
input
circuit
register
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57045910A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58163049A (ja
Inventor
Yoshiteru Katayama
Shunji Ooshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57045910A priority Critical patent/JPS58163049A/ja
Publication of JPS58163049A publication Critical patent/JPS58163049A/ja
Publication of JPS6225211B2 publication Critical patent/JPS6225211B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572Input/Output interfaces
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318552Clock circuits details

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP57045910A 1982-03-23 1982-03-23 論理回路システムの試験方式 Granted JPS58163049A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57045910A JPS58163049A (ja) 1982-03-23 1982-03-23 論理回路システムの試験方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57045910A JPS58163049A (ja) 1982-03-23 1982-03-23 論理回路システムの試験方式

Publications (2)

Publication Number Publication Date
JPS58163049A JPS58163049A (ja) 1983-09-27
JPS6225211B2 true JPS6225211B2 (ko) 1987-06-02

Family

ID=12732394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57045910A Granted JPS58163049A (ja) 1982-03-23 1982-03-23 論理回路システムの試験方式

Country Status (1)

Country Link
JP (1) JPS58163049A (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60142432A (ja) * 1983-12-28 1985-07-27 Fujitsu Ltd シリアル・データ・スキャン・イン/アウト方法
JPS61193082A (ja) * 1985-02-21 1986-08-27 Nec Corp Lsiのスキヤンパス方式
JPH0743655B2 (ja) * 1985-08-28 1995-05-15 日本電気株式会社 情報処理装置

Also Published As

Publication number Publication date
JPS58163049A (ja) 1983-09-27

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