JPS62241034A - Microprogram controller - Google Patents

Abstract

PURPOSE:To detect previously the abnormality for each microinstruction of a microprogram and also to detect the sequence abnormality of the microprogram, by using an adder and an accumulator and checking the result of accumulation. CONSTITUTION:When an instruction register 1 is initialized, a microinstruction that processes the instruction code of the register 1 is read out of a microprogram memory 5 by a microprogram sequencer 4 and checked by a parity checker 6 for each microinstruction. At the same time, the microinstructions read out of an adder 8 and an accumulator 9 are accumulated and also the parity of the microprogram is checked and accumulated. In case the microprogram is branched halfway, all branch conditions are set to a condition register 3 via a serial input (e) and then the microprogram is read out to undergo the parity check. Then the contents of the accumulator 9 are compared with the expected value. If no coincidence is obtained from said comparison, the sequence abnormality of the microprogram is decided.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a self-inspection of a microprogram control device that performs control using a microprogram control method, which is one of the control methods for electronic computers, etc. be.

[Conventional technology]

FIG. 2 is a diagram for explaining a conventional microprogram control device. In fig.

(11 is an instruction register in which instructions to be executed are stored.

+21 is an instruction register (1) Map memory in which the start address of the microprogram that processes the held instructions is recorded, (3) is the condition register that holds the branch condition of the microprogram, (4: is the execution order of the microprogram A microprogram sequencer that controls (5
1 is a micro program! The stored microprogram memory (6) is a microprogram memo! J151
A parity checker (7) is a microinstruction register that holds microinstructions.

Next, the operation will be explained. The next instruction a to be executed read from the memory is held in the instruction register (1),
The start address of the microprogram that processes the above instruction is read out by the map memory (41) and output to the microprogram memory (5+) via the microprogram sequencer (41), and the read microinstruction is stored in the microinstruction register (7). This microinstruction controls the microprogram sequencer (4:), the address of the next microprogram to be executed is output to the microprogram memo 51, and the first microinstruction to be executed is stored in the microinstruction register (4). 7) K is set. If there is a microprogram branch on the way, the computer state set in the 1 condition register (3) is tested by the microprogram sequencer (41) and 9 branches are executed. Do it.

The microinstructions are read out one after another, and each part within the computer is controlled by the signal dK. At this time, a parity check is performed on the microinstructions read from the microprogram memory (52), and in the event of an abnormality, an abnormality flag C is used to notify the outside.

[Problem that the invention seeks to solve]

Since the conventional microprogram control device is configured as described above, an abnormality is detected only when the abnormal microinstruction is read, and the abnormality cannot be detected before the microprogram is read. There were problems such as the inability to detect sequence abnormalities.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a microprogram control device that can detect abnormalities in each microinstruction of a microprogram in advance, as well as detect abnormalities in the sequence of a microprogram. With the goal.

[Means for solving problems]

A microprogram control device according to the present invention.

The instruction register has a counter function, generates all instruction codes sequentially, reads the microinstructions that process each instruction code, inspects each instruction, and accumulates all the read microinstructions. This is what I did. In addition, nine condition registers can be set arbitrarily to check branching of microinstructions.

[Effect]

A microprogram control device according to the present invention.

In addition to checking the read microinstructions by checking validity, etc., the microprogram that processes all instruction codes is checked for abnormalities in the microprogram sequence by inspecting the accumulated results of the microinstructions read out in sequence. To detect.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In Figure 1, (1) is an instruction register that is made up of a counter and stores instructions to be executed, and (2) is a map memo that records the start address of the microprogram that processes the instructions held in the instruction register + IIK. ), I3
＋ consists of a shift register that can be set to any position by serial input, and is a condition register that holds branch conditions of the microprogram. (4) is a microprogram memory that controls the execution order of the microprogram. (5)
) is a microprogram memory that stores a microprogram, (6) is a parity checker that checks microinstructions read from the microprogram memory (51), (7) is a microinstruction register that holds microinstructions, (8) is an adder that adds microinstructions sequentially,
(9) is an accumulator that holds the output of the adder (8).

Next, I will explain about the masterpiece. The control of each part within the computer is the same as a conventional microprogram control device, and operates as follows during self-skin testing.

The instruction register (1) is initialized, and the microinstruction that processes the instruction code is read out from the microprogram memory (+51) according to the sequence by the microprogram sequencer (41). tested by f5
At J time, the microinstructions read by the adder (8+) and the accumulator (9) are accumulated (.

After all microprograms that process the instruction code set in instruction register +11 have been read.

The instruction register (1) is counted up, the parity of the microprogram that processes the instruction code is checked, and the cumulative value t is obtained. If there is a branch of the microprogram on the way, read out all the microprograms by setting all the branch conditions in the 9 condition register (31) using serial e.In this way, read out all the microinstructions and check the parity. At the same time, after performing the above operations for all instruction codes, the contents of the accumulator (9) are compared with the expected value, and if different, the microprogram sequence error signal f is notified to the outside.

In the above embodiment, the checksums of all read instructions are inspected, but abnormalities can be detected in more detail by inspecting the checksums for each instruction code.

〔Effect of the invention〕

As described above, the microprogram control device according to the present invention reads each microinstruction according to its sequence, checks each instruction, and also checks the checksum of all read instructions. It is also effective in detecting sequence abnormalities.

[Brief explanation of drawings]

Figure at is a diagram for explaining a microprogram control device according to the present invention, and FIG. 2 is a diagram for explaining a conventional microprogram control device. ■ Inside, (1) is the instruction register, (2: is the map memory, (3) is the condition register, (41 is the microprogram sequencer, (5) is the microprogram memory, (6)
is a parity checker, and (7) is a microinstruction register. (81 is an adder, and (9) is an accumulator. In FIG. 9, the same or corresponding parts are given the same reference numerals.

Claims (1)

[Claims] In a microprogram control device that performs control using a microprogram control method that is a control method for electronic computers, etc., a microprogram sequence control circuit includes an instruction register having a counter function and a condition register having a function to arbitrarily set during a test; A microprogram control device comprising: a test circuit that tests microinstructions read from a microprogram memory; and an accumulator that sequentially accumulates microinstructions read from the microprogram memory.