JPH0314148A - Program breakdown detecting device - Google Patents

Abstract

PURPOSE:To immediately stop the operation of an information processor at the time of abnormality by providing a hardware for executing a data check in a memory area, based on an address of a periodical software output and executing an interruption processing to a CPU in the case an error is detected, and a software for stopping an operation of the CPU. CONSTITUTION:A memory address and a word count are set periodically by a CPU 1, and based thereon, a high speed data transfer device 2 sends an address to be inspected to a memory area of a memory map 10. When a program to be inspected becomes the end of a memory area of an interrupting circuit 3, an arithmetic circuit 6 sends a result of operation of the whole area to be inspected to a comparing circuit 4, a delaying circuit 5 and an inspection result output 7. The comparing circuit 4 does not output a result of comparison and inspection of the whole area to be inspected, while a result of operation coincides. However, in the case a program breakdown is generated, the result of comparison and inspection is outputted to the interrupting circuit 3, and the interrupting circuit 3 generates an interruption to the CPU 1, and stops its operation. In such a way, even when a malfunction is generated, an operation of the CPU is stopped immediately.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to detection of destruction of application programs on RAM used in information processing devices such as mobile terminals, word processors, and POS.

Conventional technology Conventionally, this type of program detection method has been used to detect R as shown in Figure 2.
Prepare an OM program.

The CPU is configured to inspect the contents of the application program on the RAM based on this ROMized program.

Problems to be Solved by the Invention However, in the conventional program corruption detection device described above, the CPU sequentially reads out the detection program from the memory and executes it while interpreting it. For this reason, the time required for memory checking is greatly limited by the CPU's judgment and execution speed and the number of times, and is not real-time. For example, clock frequency sMHz, 1ebit operation, 5bit
When executed on a memory area of 512 kbytes using a CPU with t output, it takes at least several tens of seconds. For this reason, it has been necessary to detect whether or not the program has been corrupted while the application program is not being executed.

In addition, if the CPU runs out of control, it may be stopped manually from the outside or by chance. ・Unless an input command is input, the CPU will arbitrarily rewrite programs and data in memory. Put it away. For this reason, there was a possibility that the user would use the program without noticing that the content of the program was different from what was intended, resulting in malfunction.

Furthermore, it was difficult for the program developer to determine what was causing the program to run out of control.

The present invention solves these conventional problems,
It is an object of the present invention to provide an excellent program corruption detection device that can constantly inspect the contents of an application program when the application program is in use, and can immediately stop the operation of an information processing device in the event of an abnormality.

Means for Solving the Problems In order to achieve the above-mentioned problems, the present invention provides software that periodically outputs a specific memory address, and memory output based on the address of the software output, independent of CPU control and at high speed. We have installed hardware that performs a pig check in the area and records the results, hardware that interrupts the CPU when an error is found in the test results, and software that stops the CPU's operation. It is designed to perform a memory check.

Function: With the above-described configuration, the present invention performs a memory check in real time even while an application program is running, so that even if a malfunction occurs, the CPU operation can be corrected before the user is aware of it. Can be stopped. In other words, it is possible to prevent the user from using a program with incorrect contents without realizing it, and the operation of the software can be ensured. Furthermore, since self-destruction of the program can be kept to a minimum, it becomes easier for the program developer to investigate the cause.

Embodiment FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, (a) indicates a memory address and word count, which are periodically set in the high-speed data transfer device 2 by the CPU 1. High-speed data 5 \ The overnight transfer device 2 sends the address to be tested (c) to the memory area of the memory map 10 based on the settings in (a).

The high-speed data transfer device 2 considers the program obtained from the memory map 10 as the program to be tested (b) as a pig string, and sequentially sends it to the arithmetic circuit 6 as the program to be tested (b). The arithmetic circuit 6 latches the first and second bits of the input program to be tested (b) bit by bit. Then, the bitwise exclusive OR of both is performed as the result of the previous operation (
e).

Next, after latching its own previous operation result output (e) bit by bit, it latches the third program to be tested (b), and performs an exclusive OR of these bit by bit. Similarly, the arithmetic circuit 6 continues this operation until the program to be tested (b) reaches the end of the memory area 3. When the program to be tested ←) reaches the end of the memory area of the interrupt circuit 3, the arithmetic circuit 6 sends the calculation result of the entire area to be tested as (to) to the comparison circuit 4, the delay circuit 5, and the test result output cuff. The delay circuit 6 is a part that calculates one 17-time delay for the calculation results of the entire test area that are sequentially input. Due to this 6.\7, the operation result (g) becomes the result of the previous operation.

The comparator circuit 4 does not output the comparison test result (force) for the entire area to be inspected while these calculation results (f) and (g) match.However, if program destruction occurs, the comparator circuit 4 outputs the calculation result (f).
to) to (g) and the comparison test results (the power is the interrupt circuit 3
It will be output to . As a result, the interrupt circuit 3 generates an interrupt to the CPU 1 and stops its operation.

Note that the DMA in FIG. 1 is hardware that checks the software output and records the results independently of the control of the CPU and at high speed.

Next, another example will be described. The composition is the same as the previous example.
Illustrated in the figure. However, the function of the arithmetic circuit 60 is changed as described below. Input test program (b)
The first value is zero, and an addition with a carry is performed. The output (e) is latched and added with a carry-over to the second program to be tested (b).

In the same manner, the operations of the arithmetic circuits 7 and 6 continue until the program to be tested (b) reaches the end of the memory area 3. When the end of the memory area of the program to be tested (b) or 3 is reached, the arithmetic circuit 6 sends the arithmetic result as (b) to the comparator circuit 4, the delay circuit 5, and the test result amount cuff. The functions and operation sequences of the configuration other than the arithmetic circuit 6 are exactly the same as in the previous example.1 However, in this case, the cause investigation method on the program developer side will be different.

Effects of the Invention As is clear from the above embodiments, the present invention is designed so that even if the CPU itself performs the comparative judgment, the software performs this on behalf of the CPU. It has the advantage of being able to check. Furthermore, if a change occurs in the check result, an interrupt is immediately issued to the CPU and the operation of the CPU is stopped, which has the effect of ensuring the operation content of the application program.

[Brief explanation of drawings]

FIG.
, FIG. 2 is a block diagram of a conventional program corruption detection device. 1...CPU, 2...High-speed data transfer compensation 1", 3...Interrupt circuit, 4...Comparison circuit, 5...Delay Circuit # Arithmetic circuit, 7...
...Inspection result output, 8...Test area, I...
・Start address and area length of the area to be inspected...
・Program to be tested, C ・Address to be tested, 2...
...Program under test, ho...-previous calculation result,
To...Computation results for the entire area to be inspected, 1-...
・Previous calculation result for the whole area to be inspected, ・・・・・
Comparative inspection results for the entire inspected area.

Claims (1)

[Claims] A RAM containing an application program as its contents, software that periodically outputs a specific memory address, and a system that checks data in the memory area based on the address of the software's output independently of CPU control, and also checks the results. A program corruption detection device is equipped with hardware for recording, hardware for processing an interrupt to the CPU in the event of an error, and software for stopping the operation of the CPU.