JPS62235739A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS62235739A JPS62235739A JP7976486A JP7976486A JPS62235739A JP S62235739 A JPS62235739 A JP S62235739A JP 7976486 A JP7976486 A JP 7976486A JP 7976486 A JP7976486 A JP 7976486A JP S62235739 A JPS62235739 A JP S62235739A
- Authority
- JP
- Japan
- Prior art keywords
- film
- deposited
- heat
- boron
- weight
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052796 boron Inorganic materials 0.000 claims abstract description 17
- 238000010438 heat treatment Methods 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 16
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 13
- 239000011574 phosphorus Substances 0.000 claims abstract description 13
- 239000011521 glass Substances 0.000 claims abstract description 12
- 239000005360 phosphosilicate glass Substances 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 7
- 239000012535 impurity Substances 0.000 claims description 3
- 239000012298 atmosphere Substances 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052710 silicon Inorganic materials 0.000 abstract description 8
- 239000010703 silicon Substances 0.000 abstract description 8
- 229910052782 aluminium Inorganic materials 0.000 abstract description 6
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 2
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 abstract 1
- 239000004411 aluminium Substances 0.000 abstract 1
- 229910021332 silicide Inorganic materials 0.000 abstract 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 30
- 238000009792 diffusion process Methods 0.000 description 7
- 238000002844 melting Methods 0.000 description 6
- 230000008018 melting Effects 0.000 description 6
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 3
- 229910001882 dioxygen Inorganic materials 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000008034 disappearance Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 229910001385 heavy metal Inorganic materials 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は半導体装置特に表面にボロンリンケイ酸ガラス
(以下BPSGと略す)膜を有する半導体装置の製造方
法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device, and particularly to a method for manufacturing a semiconductor device having a boron phosphosilicate glass (hereinafter abbreviated as BPSG) film on its surface.
従来の技術
リンケイ酸ガラス(以下、 PSG と略す)の溶融(
リフロー)による平担化は、従来より行われているが、
PSG のりフロ一温度が1000℃以上と高いため
に、この処理工程で例えばMO8型素子のソース、ドレ
イン拡散層の不純物の拡散深さが深くなり、素子のチャ
ネル長が2μm以下の超LSI等で必要となる短チャネ
ル長の精密制御などを実現するのは困難である。Conventional technology Melting of phosphosilicate glass (hereinafter abbreviated as PSG)
Flattening by reflow) has been done for a long time, but
Because the PSG glue flow temperature is as high as 1000°C or more, this processing step increases the depth of impurity diffusion in the source and drain diffusion layers of MO8 type devices, for example, and is difficult to use in ultra-LSI devices with channel lengths of 2 μm or less. It is difficult to achieve the necessary precision control of short channel lengths.
一方PSGのリン濃度を増すことでPSG のりフロ一
温度を下げることもできるが、リン濃度を増すことは半
導体装置の信頼性の低下をまねく等の゛不都合がある。On the other hand, by increasing the phosphorus concentration of PSG, the PSG adhesive flow temperature can be lowered, but increasing the phosphorus concentration has disadvantages such as lowering the reliability of the semiconductor device.
この様な問題を解決できる方法として、近年、PSGに
変わり1000℃以下の低温3 ”−/
でも溶融(フロー)するBPSGが注目されている。As a method that can solve these problems, in recent years, BPSG, which melts (flows) even at low temperatures of 3''-/ below 1000° C., has been attracting attention in place of PSG.
従来のBPSGのフローを採用したnチャネルMO8型
半導体装置の製造工程を第2図a ’−eを参照して説
明すへマ亥第2図aに示すようにシリコン基板1の上に
選択酸化(LOCO8)膜2.ゲート酸化膜3.多結晶
シリコンゲート層4.拡散層6を形成し、さらに基板表
面全域に窒化シリコン膜6を堆積する。The manufacturing process of an n-channel MO8 type semiconductor device using the conventional BPSG flow will be explained with reference to FIG. 2 a'-e.As shown in FIG. (LOCO8) Membrane 2. Gate oxide film 3. Polycrystalline silicon gate layer 4. A diffusion layer 6 is formed, and a silicon nitride film 6 is further deposited over the entire surface of the substrate.
次に第2図すに示すように例えばボロン濃度3重量%、
リン濃度4重置部のBPSG膜7を堆積し、BPSG膜
を焼きしめるため酸素ガス中、900℃で60分間の熱
処理(フロー)を施す。引き続きように7オスフイン(
PH3)を含む酸素ガス中で950℃で10分間の熱処
理を施す。この熱処理によりBPSG膜7は再び溶融(
リフロー)され平担化できると同時に、重金属やN4が
リンゲッタされるため半導体素子特性の信頼性が向上す
る。Next, as shown in Figure 2, for example, a boron concentration of 3% by weight,
A BPSG film 7 with a quadruple phosphorus concentration layer is deposited, and heat treatment (flow) is performed at 900° C. for 60 minutes in oxygen gas to bake the BPSG film. 7 Osufin as continued (
Heat treatment is performed at 950° C. for 10 minutes in oxygen gas containing PH3). This heat treatment melts the BPSG film 7 again (
At the same time, since heavy metals and N4 are ring-gettered, the reliability of semiconductor device characteristics is improved.
また、コンタクト孔内のシリコン基板にリンが深く熱拡
散されるため、アルミニウム電極とシリコン基板の合金
化によって生じたスパイクに起因するコンタクト部での
リーク電流も抑制される。Furthermore, since phosphorus is thermally diffused deeply into the silicon substrate within the contact hole, leakage current at the contact portion due to spikes caused by alloying the aluminum electrode and the silicon substrate is also suppressed.
この後、第2図e薩すようにリフロ一工程でシリコン露
出面に形成された酸化膜を除去し、最後にアルミニウム
配線9を形成することによりnチャネルMO8型トラン
ジスタが完成する。Thereafter, as shown in FIG. 2e, the oxide film formed on the exposed silicon surface is removed in a reflow step, and finally an aluminum wiring 9 is formed to complete an n-channel MO8 type transistor.
発明が解決しようとする問題点
しかしながら、この場合はBPSG膜に開孔した微細な
コンタクト孔がリフロ一工程の熱処理の際にBPSGの
溶融によって消滅することがしばしばある。BPSG膜
のボロン濃度やリン濃度を低くし、リフローの程度を抑
えることでコンタクト孔の消滅を防止できるが、フロ一
工程においてBPSG膜を充分に平担化することができ
ない。一方、BPSG膜のりフローを抑えるためにり7
0一工程の熱処理温度を下げることや熱処理時間を短く
した場合、重金属等のリンゲッタ効果が小さくなり、半
導体素子の特性が劣化するという問題が生じる。Problems to be Solved by the Invention However, in this case, fine contact holes formed in the BPSG film often disappear due to melting of the BPSG during heat treatment in the reflow step. Although it is possible to prevent contact holes from disappearing by lowering the boron concentration and phosphorus concentration of the BPSG film and suppressing the degree of reflow, the BPSG film cannot be sufficiently planarized in the flow process. On the other hand, in order to suppress the BPSG film glue flow,
If the heat treatment temperature or heat treatment time in the 01 step is lowered, the ring getter effect of heavy metals etc. will be reduced, causing a problem that the characteristics of the semiconductor element will deteriorate.
問題点を解決するだめの手段
6ベー7゛
前記問題点を解決するために本発明は半導体基板上に計
成された所望の半導体装置の表面上に絶縁膜を堆積する
工程と、前記絶縁膜上に第1のボロンリンケイ酸ガラス
膜を堆積する工程と、前記第1のボロンリンケイ酸ガラ
ス膜上に前記のボロンリンケイ酸ガラスと組成率を異に
する第2のボロンリンケイ酸ガラス膜を堆積する工程と
、前記第1および第2のボロンリンケイ酸ガラスを熱処
理により平担化する工程と、前記第1および第2のボロ
ンリンケイ酸ガラス膜と前記絶縁膜とを貫通するコンタ
クト孔を開孔する工程と、前記半導体基板の不純物を含
むガス雰囲気中で前記半導体基板を熱処理する工程とを
含むことを特徴とする半導体装置の製造方法を提供する
。 ′作 用
上記手段によれば、第2BPSG膜のボロン・リン濃度
が高濃度であるためフロ一工程で充分にBPSG膜を平
担にすることができる。リフロ一工程においては、熱処
理条件を変更しなくとも、第1BPSG膜のボロン・リ
ン濃度が低いため、コン6ページ
タクト孔の下部のBPSG膜の溶融が抑制されBPSG
膜に開孔した微細なコンタクト孔が消滅しない。Means for Solving the Problems 6.7 In order to solve the above problems, the present invention provides a step of depositing an insulating film on the surface of a desired semiconductor device formed on a semiconductor substrate, and a step of depositing the insulating film on the surface of a desired semiconductor device formed on a semiconductor substrate. a step of depositing a first boronphosphosilicate glass film on the boronphosphosilicate glass film; a step of depositing a second boronphosphosilicate glass film having a different composition ratio from the boronphosphosilicate glass on the first boronphosphosilicate glass film; flattening the first and second boron phosphosilicate glasses by heat treatment; forming a contact hole penetrating the first and second boron phosphosilicate glass films and the insulating film; Provided is a method for manufacturing a semiconductor device, comprising the step of heat-treating the semiconductor substrate in a gas atmosphere containing impurities of the substrate. According to the above means, since the boron/phosphorus concentration of the second BPSG film is high, the BPSG film can be made sufficiently flat in one flow process. In the first reflow process, even without changing the heat treatment conditions, the boron and phosphorous concentration of the first BPSG film is low, so melting of the BPSG film at the bottom of the contact hole is suppressed and the BPSG
Fine contact holes opened in the film do not disappear.
又、コンタクト孔の上端部にある第2BPSG膜はりフ
ロ一工程において容易に溶融し、コンタクト孔の上端部
側壁に適肖な傾斜が得られる。In addition, the second BPSG film at the upper end of the contact hole is easily melted during the flow process, and a suitable slope can be obtained on the side wall of the upper end of the contact hole.
実施例
以下、本発明にかかるMO8型半導体集積回路の製造方
法の一実施例について述べる。なお、簡明化のために一
個のMO8型トランジスタ部を拡大して示した第1図を
参照し説明する。EXAMPLE An example of the method for manufacturing an MO8 type semiconductor integrated circuit according to the present invention will be described below. For the sake of simplicity, the description will be made with reference to FIG. 1, which shows an enlarged view of one MO8 type transistor section.
結晶シリコンゲート層4を有し、さらに基板1内に拡散
層6を形成した試料に、基板表面全域に例えば膜厚10
00Aの窒化シリコン膜6を堆積する。A sample having a crystalline silicon gate layer 4 and a diffusion layer 6 formed within the substrate 1 is coated with a film thickness of, for example, 10 mm over the entire surface of the substrate.
A silicon nitride film 6 of 00A is deposited.
次に、第1図すに示すようにボロン濃度2重量る。引き
続いて、ボロン濃度3重量%、リン濃度7パ− ・
5重量%、膜厚5000への第2BPSG膜8を上記第
1BPSG膜上に堆積する。Next, as shown in Figure 1, the boron concentration is 2 weight. Subsequently, a second BPSG film 8 having a boron concentration of 3% by weight, a phosphorus concentration of 7%-5% by weight, and a thickness of 5000 is deposited on the first BPSG film.
この後、第1図Cに示すように第1および第2BPSG
膜7,8の焼きしめと溶融(フロー)を目的としだ熱処
理を酸素ガス中で900’C,60分間施する。次に、
第1図dに示すようにホトレジストをマスクにしてエツ
チングを行いコンタクト孔を開孔する。そして、第1図
eに示すように第1および第2BPSG膜7,802回
目の溶融(リフロー)とコンタクト拡散層を形成するた
め、フォスフイン(PH3)を含む雰囲気中、950’
Cで10分間熱処理する。この熱処理過程でシリコン露
出面に酸化膜が形成されるので、この酸化膜を除去した
後、アルミニウム配線9を形成する。以上でnチャネル
MO8型トランジスタが完成する。After this, as shown in FIG. 1C, the first and second BPSG
Heat treatment is performed at 900'C for 60 minutes in oxygen gas for the purpose of baking and melting (flowing) the films 7 and 8. next,
As shown in FIG. 1d, etching is performed using a photoresist as a mask to form a contact hole. Then, as shown in FIG. 1e, in order to melt the first and second BPSG films 7 and 802 times and form a contact diffusion layer, 950'
Heat treatment at C for 10 minutes. During this heat treatment process, an oxide film is formed on the exposed silicon surface, so after removing this oxide film, aluminum wiring 9 is formed. With the above steps, an n-channel MO8 type transistor is completed.
以上の実施例では、第2BPSG膜のボロン・リン濃度
が従来例より高濃度で堆積するため、膜厚が従来例より
減少してもフロ一工程で充分に平担′化される。In the embodiments described above, the second BPSG film is deposited with a higher concentration of boron and phosphorus than in the conventional example, so that even if the film thickness is reduced compared to the conventional example, it can be sufficiently flattened in one flow process.
一方、第1 BPSG膜はボロン・リン濃度が低いので
フロ一工程において溶融が抑えられるが、リフロ一工程
度では微細なコンタクト孔の消滅を防止するのに効果が
ある。又、リフロ一工程では第2BPSGが容易に溶融
し、コンタクト孔の上端部側壁において適当な傾斜が得
られる。On the other hand, since the first BPSG film has a low concentration of boron and phosphorus, melting can be suppressed in one flow process, but it is effective in preventing the disappearance of fine contact holes in one reflow process. Further, in the reflow step, the second BPSG is easily melted, and an appropriate slope can be obtained at the upper end side wall of the contact hole.
本発明はMO8型集積回路の製造を例示して説明したが
、本発明はBPSG膜のリフローが必要な半導体装置全
般に応用できるものである。また、実施例では2層構造
のBPSG膜を用いて説明したが3層構造以上のBPS
G膜やBPSG膜にボロンやリン濃度の厚さ方向の分布
を形成しても同様な効果は得られる。Although the present invention has been described by exemplifying the manufacture of an MO8 type integrated circuit, the present invention can be applied to all semiconductor devices requiring reflow of a BPSG film. In addition, although the example was explained using a BPSG film with a two-layer structure, it is also possible to use a BPS film with a three-layer structure or more.
A similar effect can be obtained by forming a distribution of boron or phosphorus concentration in the thickness direction of the G film or BPSG film.
発明の効果
本発明によれば、BPSG膜を用いて基板表面を充分に
平担にし、微細なコンタクト孔も消滅させることなく、
コンタクト拡散層を形成できる。以上のように本発明は
、従来のBPSG膜の溶融熱処理で発生したコンタクト
孔の消滅等の不都合を除くことができ、高集積半導体装
置の製造に大きく寄与する。Effects of the Invention According to the present invention, a BPSG film is used to make the substrate surface sufficiently flat, without eliminating even minute contact holes.
A contact diffusion layer can be formed. As described above, the present invention can eliminate inconveniences such as the disappearance of contact holes caused by conventional melting heat treatment of BPSG films, and greatly contributes to the production of highly integrated semiconductor devices.
9へ一ノIchino to 9
第1図a ’−eは本発明の一実施例を説明するだめの
工程断面図、第2図a−eは従来技術を説明するだめの
工程断面図である。
1・・・・・シリコン基板、2・・・・・・LOCO8
酸化膜、3・・・・・・ゲート酸化膜、4・・・・・・
多結晶シリコンゲート層、6・・・・・・拡散層、6・
・・ ・窒化シリコン膜、7゜8・・・・・・BPSG
膜、9・・・・・・アルミニウム配線。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名1−
−−シソコン1−8η
2〜LOCO5劇(臘
3−−−1−1− ・!
8−−一方2 ・
第1図
9−−−アルミ;つAfl乙未乙
未−βIδす祷FIGS. 1A to 1E are cross-sectional views illustrating an embodiment of the present invention, and FIGS. 2A to 2E are cross-sectional views illustrating a conventional technique. 1...Silicon substrate, 2...LOCO8
Oxide film, 3...Gate oxide film, 4...
polycrystalline silicon gate layer, 6...diffusion layer, 6.
・・Silicon nitride film, 7゜8・・・・・・BPSG
Film, 9... Aluminum wiring. Name of agent: Patent attorney Toshio Nakao and 1 other person1-
--Sisocon 1-8η 2~LOCO5 drama (臘3---1-1- ・! 8--One side 2 ・ 1 Figure 9---Aluminum; Tsu Afl Otomi Otomi-βIδ prayer
Claims (2)
面上に絶縁膜を堆積する工程と、前記絶縁膜上に第1の
ボロンリンケイ酸ガラス膜を堆積する工程と、前記第1
のボロンリンケイ酸ガラス膜上に前記第1のボロンリン
ケイ酸ガラスと組成率を異にする第2のボロンリンケイ
酸ガラス膜を堆積する工程と、前記第1および第2のボ
ロンリンケイ酸ガラスを熱処理により平担化する工程と
、前記第1および第2のボロンリンケイ酸ガラス膜と前
記絶縁膜とを貫通するコンタクト孔を開孔する工程と、
前記半導体基板の不純物を含むガス雰囲気中で前記半導
体基板を熱処理する工程とを含むことを特徴とする半導
体装置の製造方法。(1) Depositing an insulating film on the surface of a desired semiconductor device formed on a semiconductor substrate; depositing a first boron phosphosilicate glass film on the insulating film;
depositing a second boronphosphosilicate glass film having a different composition ratio from the first boronphosphosilicate glass on the boronphosphosilicate glass film, and flattening the first and second boronphosphosilicate glasses by heat treatment. a step of opening a contact hole penetrating the first and second boron phosphosilicate glass films and the insulating film;
A method for manufacturing a semiconductor device, comprising the step of heat-treating the semiconductor substrate in a gas atmosphere containing impurities.
度が第1のボロンリンケイ酸ガラスのボロン・リン濃度
よりそれぞれ高濃度である特許請求の範囲第1項記載の
半導体装置の製造方法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein the boron and phosphorus concentrations of the second boronphosphosilicate glass are higher than those of the first boronphosphosilicate glass.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7976486A JPS62235739A (en) | 1986-04-07 | 1986-04-07 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7976486A JPS62235739A (en) | 1986-04-07 | 1986-04-07 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62235739A true JPS62235739A (en) | 1987-10-15 |
Family
ID=13699284
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7976486A Pending JPS62235739A (en) | 1986-04-07 | 1986-04-07 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62235739A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5006484A (en) * | 1989-02-01 | 1991-04-09 | Oki Electric Industry Inc, Co. | Making a semiconductor device with contact holes having different depths |
JPH07307339A (en) * | 1994-04-12 | 1995-11-21 | Sgs Thomson Microelettronica Spa | Even process |
US5631174A (en) * | 1995-12-21 | 1997-05-20 | Micron Technology, Inc. | Method for forming a spacer with a prograde profile |
WO1997024755A1 (en) * | 1995-12-29 | 1997-07-10 | Lam Research Corporation | Semiconductor structure using modulation doped silicate glasses |
US6319848B1 (en) * | 1993-10-12 | 2001-11-20 | Texas Instruments Incorporated | Inhomogenous composite doped film for low temperature reflow |
-
1986
- 1986-04-07 JP JP7976486A patent/JPS62235739A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5006484A (en) * | 1989-02-01 | 1991-04-09 | Oki Electric Industry Inc, Co. | Making a semiconductor device with contact holes having different depths |
US6319848B1 (en) * | 1993-10-12 | 2001-11-20 | Texas Instruments Incorporated | Inhomogenous composite doped film for low temperature reflow |
JPH07307339A (en) * | 1994-04-12 | 1995-11-21 | Sgs Thomson Microelettronica Spa | Even process |
US5631174A (en) * | 1995-12-21 | 1997-05-20 | Micron Technology, Inc. | Method for forming a spacer with a prograde profile |
WO1997024755A1 (en) * | 1995-12-29 | 1997-07-10 | Lam Research Corporation | Semiconductor structure using modulation doped silicate glasses |
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